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SN74BCT2241NE4 датащи(PDF) 1 Page - Texas Instruments

номер детали SN74BCT2241NE4
подробное описание детали  OCTAL BUFFER AND LINE/MOS DRIVER WITH 3-STATE OUTPUTS
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производитель  TI [Texas Instruments]
домашняя страница  http://www.ti.com
Logo TI - Texas Instruments

SN74BCT2241NE4 датащи(HTML) 1 Page - Texas Instruments

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SN74BCT2241
OCTAL BUFFER AND LINE/MOS DRIVER
WITH 3-STATE OUTPUTS
SCBS035D – SEPTEMBER 1988 – REVISED MARCH 2003
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D Operating Voltage Range of 4.5 V to 5.5 V
D State-of-the-Art BiCMOS Design
Significantly Reduces ICCZ
D Output Ports Have Equivalent 33-Ω Series
Resistors, So No External Resistors Are
Required
D 3-State Outputs Drive Bus Lines or Buffer
Memory Address Registers
D ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
description/ordering information
This SN74BCT2241 is designed specifically to
improve both the performance and density of
3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. Together with the
’BCT2240 and ’BCT2244 devices, this device provides the choice of selected combinations of inverting and
noninverting outputs, symmetrical active-low output-enable (OE) inputs, and complementary OE and OE
inputs. This device features high fan-out and improved fan-in.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor and OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is
determined by the current-sinking/current-sourcing capability of the driver.
The outputs, which are designed to source or sink up to 12 mA, include 33-
Ω series resistors to reduce overshoot
and undershoot.
ORDERING INFORMATION
TA
PACKAGE†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
PDIP – N
Tube
SN74BCT2241N
SN74BCT2241N
0
°Cto70°C
SOIC
DW
Tube
SN74BCT2241DW
BCT2241
0
°C to 70°C
SOIC – DW
Tape and reel
SN74BCT2241DWR
BCT2241
SOP – NS
Tape and reel
SN74BCT2241NSR
BCT2241
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
FUNCTION TABLES
INPUTS
OUTPUT
1OE
1A
1Y
L
H
H
L
LL
H
XZ
INPUTS
OUTPUT
2OE
2A
2Y
H
H
H
H
LL
L
X
Z
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
1OE
1A1
2Y4
1A2
2Y3
1A3
2Y2
1A4
2Y1
GND
VCC
2OE
1Y1
2A4
1Y2
2A3
1Y3
2A2
1Y4
2A1
DW, N OR NS PACKAGE
(TOP VIEW)
Copyright
 2003, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.


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