поискавой системы для электроныых деталей |
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TDA4688 датащи(PDF) 6 Page - NXP Semiconductors |
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TDA4688 датащи(HTML) 6 Page - NXP Semiconductors |
6 / 24 page 1997 Jun 23 6 Philips Semiconductors Product specification Video processor with automatic cut-off control TDA4688 I2C-BUS PROTOCOL Control The I2C-bus transmitter provides the data bytes to select and adjust the following functions and parameters: • Brightness adjust • Saturation adjust • Contrast adjust • DC output e.g. for hue control • RGB gain adjust • Peak drive limiting level adjust • Selects either 3-level or 2-level (5 V) sandcastle pulse • Enables cut-off control; enables output clamping (2 different modes) • Selects either PAL/SECAM or NTSC matrix • Enables/disables synchronization of the execution of I2C-bus commands with the vertical blanking interval • Enables Y/CD, RGB1 or RGB2 input. I2C-bus transmitter and data transfer I2C-BUS SPECIFICATION The I2C-bus is a bidirectional, two-wire, serial data bus for intercommunication between ICs in an equipment. The microcontroller transmits data to the I2C-bus receiver in the TDA4688 over the serial data line SDA (pin 27) synchronized by the serial clock line SCL (pin 28). Both lines are normally connected to a positive voltage supply through pull-up resistors. Data is transferred when the SCL line is LOW. When SCL is HIGH the serial data line SDA must be stable. A HIGH-to-LOW transition of the SDA line when SCL is HIGH is defined as a START bit. A LOW-to-HIGH transition of the SDA line when SCL is HIGH is defined as a STOP bit. Each transmission must start with a START bit and end with a STOP bit. The bus is busy after a START bit and is only free again after a STOP bit has been transmitted. I2C-BUS RECEIVER (MICROCONTROLLER WRITE MODE) Each transmission to the I2C-bus receiver consists of at least three bytes following the START bit. Each byte is acknowledged by an acknowledge bit immediately following each byte. The first byte is the Module Address (MAD) byte, also called slave address byte. This includes the module address, 1000100 for the TDA4688. The TDA4688 is a slave receiver (R/W = 0), therefore the module address byte is 10001000 (88H; see also Fig.3). The length of a data transmission is unrestricted, but the module address and the correct subaddress must be transmitted before the data byte(s). The order of data transmission is shown in Figs 4 and 5. Without auto-increment (BREN = 0 or 1) the module address (MAD) byte is followed by a SubAddress (SAD) byte and one data byte only (see Fig.4). |
Аналогичный номер детали - TDA4688 |
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Аналогичное описание - TDA4688 |
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