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TDA9143 датащи(PDF) 6 Page - NXP Semiconductors |
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TDA9143 датащи(HTML) 6 Page - NXP Semiconductors |
6 / 40 page 1996 Jan 17 6 Philips Semiconductors Preliminary specification I2C-bus controlled, alignment-free PAL/NTSC/SECAM decoder/sync processor TDA9143 FUNCTIONAL DESCRIPTION The TDA9143 is an I2C-bus controlled, alignment-free PAL/NTSC/SECAM colour decoder/sync processor which has been designed for use with baseband chrominance delay lines. For PALplus and EDTV-2 (60 Hz) signals blanking facilities are included. In the standard operating mode the I2C-bus address is 8A. If the address input is connected to the positive supply rail the address will change to 8E. Input switch The TDA9143 has a two pin input for CVBS or Y/C signals which can be selected via the I2C-bus. The input selector also has a position in which it automatically detects whether a CVBS or Y/C signal is on the input. In this input selector position, standard identification first takes place on an added Y/CVBS and C input signal. After that, both chrominance signal input amplitudes are checked once and the input with the strongest chrominance burst signal is selected. The input switch status is read out by the I2C-bus via output bit YC. The auto input detector indicates YC = 1 for a VBS input signal (no chrominance component). CVBS output In the standard operating mode with I2C-bus address 8A, a CVBS output signal is available on the address pin, which represents either the CVBS input signal or the Y/C input signal, added into a CVBS signal. RGB colour matrix The TDA9143 has a colour matrix to convert RGB input signals into YUV signals. A fast switch, controlled by the signal on pin F and enabled by I2C-bus via EFS (enable fast switch), can select between these YUV signals and the YUV signals of the decoder. Mode FRGB = 1 (forced RGB) overrules EFS and switches the matrixed RGB inputs to the YUV outputs. CAUTION The voltage on the chrominance pin must never exceed 5.5 V. If it does, the IC enters a test mode. CAUTION The voltage on the Uin pin must never exceed 5.5 V. If it does, the IC enters a test mode. The Y signal is internally connected to the switch. The −(R−Y) and −(B−Y) output signals of the decoder first have to be delayed in external baseband chrominance delay lines. The outputs of the delay lines must be connected to the UV input pins. If the RGB signals are not synchronous with the selected decoder input signal, clamping of the RGB input signals is possible by I2C-bus selection of ECL (external RGB clamp mode) and by feeding an external clamping signal to the CLP pin. Also in external RGB clamp mode the VA output will be in a high impedance OFF-state. The YUV outputs can be put in 3-state mode by bus bit LPS (low power standby mode). Standard identification The standards which the TDA9143 can decode depend upon the choice of external crystals. If a 4.4 MHz and a 3.6 MHz crystal are used then SECAM, PAL 4.4/3.6 and NTSC 4.4/3.6 can be decoded. If two 3.6 MHz crystals are used then only PAL 3.6 and NTSC 3.6 can be decoded. Which 3.6 MHz standards can be decoded depends upon the exact frequencies of the 3.6 MHz crystals. In an application where not all standards are required only one crystal is sufficient; in this instance the crystal must be connected to the reference crystal input (pin 30). If a 4.4 MHz crystal is used it must always be connected to the reference crystal input. Both crystals are used to provide a reference for the filters and the horizontal PLL, however, only the reference crystal is used to provide a reference for the SECAM demodulator. To enable the calibrating circuits to be adjusted exactly, two bits from I2C-bus subaddress 00 are used to indicate which crystals are connected to the IC. The standard identification circuit is a digital circuit without external components. The search loop is illustrated in Fig.3. The decoder (via the I2C-bus) can be forced to decode either SECAM or PAL/NTSC (but not PAL or NTSC). Crystal selection can also be forced. Information concerning standard and which crystal is selected and whether the colour killer is ON or OFF is provided by the read out. Using the forced-mode does not affect the search loop, it does however prevent the decoder from reaching or staying in an unwanted state. The identification circuit skips impossible standards (e.g. SECAM when no 4.4 MHz crystal is fitted) and illegal standards (e.g. in forced mode). To reduce the risk of wrong identification, PAL has priority over SECAM. Only line identification is used for SECAM. For a vertical frequency of 60 Hz, SECAM can be blocked to prevent wrong identification by means of bus bit SAF. |
Аналогичный номер детали - TDA9143 |
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Аналогичное описание - TDA9143 |
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