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74VHC595M датащи(PDF) 7 Page - Fairchild Semiconductor |
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74VHC595M датащи(HTML) 7 Page - Fairchild Semiconductor |
7 / 12 page ©1993 Fairchild Semiconductor Corporation www.fairchildsemi.com 74VHC595 Rev. 1.2 7 AC Electrical Characteristics Notes: 3. Parameter guaranteed by design. tOSLH = | tPLH max – tPLH min|; tOSHL = | tPHL max – tPHL min| 4. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC (Opr.) = CPD • VCC • fIN + ICC Symbol Parameter VCC (V) Conditions TA = +25°C TA = –40°C to +85°C Units Min. Typ. Max. Min. Max. tPLH, tPHL Propagation Delay Time, RCK to QA–QH 3.3 ± 0.3 CL = 15pF 7.7 11.9 1.0 13.5 ns CL = 50pF 10.2 15.4 1.0 17.0 5.0 ± 0.5 CL = 15pF 5.4 7.4 1.0 8.5 ns CL = 50pF 6.9 9.4 1.0 10.5 tPLH, tPHL Propagation Delay Time, SCK–Q'H 3.3 ± 0.3 CL = 15pF 8.8 13.0 1.0 15.0 ns CL = 50pF 11.3 16.5 1.0 18.5 5.0 ± 0.5 CL = 15pF 6.2 8.2 1.0 9.4 ns CL = 50pF 7.7 10.2 1.0 11.4 tPHL Propagation Delay Time, SCLR –Q'H 3.3 ± 0.3 CL = 15pF 8.4 12.8 1.0 13.7 ns CL = 50pF 10.9 16.3 1.0 17.2 5.0 ± 0.5 CL = 15pF 5.9 8.0 1.0 9.1 ns CL = 50pF 7.4 10.0 1.0 11.1 tPZL, tPZH Output Enable Time, G to QA–QH 3.3 ± 0.3 RL = 1kΩ CL = 15pF 7.5 11.5 1.0 13.5 ns CL = 50pF 9.0 15.0 1.0 17.0 5.0 ± 0.5 CL = 15pF 4.8 8.6 1.0 10.0 ns CL = 50pF 8.3 10.6 1.0 12.0 tPLZ, tPHZ Output Disable Time, G to QA–QH 3.3 ± 0.3 RL = 1kΩ CL = 50pF 12.1 15.7 1.0 16.2 ns 5.0 ± 0.5 CL = 50pF 7.6 10.3 1.0 11.0 fMAX Maximum Clock Frequency 3.3 ± 0.3 CL = 15pF 80 150 70 MHz CL = 50pF 55 130 50 5.0 ± 0.5 CL = 15pF 135 185 115 MHz CL = 50pF 95 155 85 tOSLH, tOSHL Output to Output Skew 3.3 ± 0.3 (3) CL = 50pF 1.5 1.5 ns 5.0 ± 0.5 CL = 50pF 1.0 1.0 CIN Input Capacitance VCC = Open 5.0 10 10 pF COUT Output Capacitance VCC = 5.0V 6.0 pF CPD Power Dissipation Capacitance (4) 87 pF |
Аналогичный номер детали - 74VHC595M |
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Аналогичное описание - 74VHC595M |
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