SM5816AF

SEIKO NPC CORPORATION —8

DSD input/output

I

DSBCKF, DSBCKB pins

I

DSIFL, DSIFR, DSISL, DSISR, DSICT, DSISW pins

I

DSOFL, DSOFR, DSOSL, DSOSR, DSOCT, DSOSW, DSOSBL, DSOSBR pins

Note. The DSD clock pulsewidth and clock pulse cycle are with both DSBCKF and DSBCKB in input mode.

Note. Data is read internally using the falling edge of MCK, using the DSBCKF timing above as the base. When the timing changes, resynchronization

must be performed using INIT or SYNC.

Parameter

Symbol

Rating

Unit

min

typ

max

DSD clock pulsewidth

150

177.16

–

ns

DSD clock pulse cycle

300

354.31 (1/64fs)

–

ns

DSD data setup time

50

–

–

ns

DSD data hold time

50

–

–

ns

DSD data delay time

0

–

15

ns

DSI**: DSIFL, DSIFR, DSISL, DSISR, DSICT, DSISW pins

DSO**: DSOFL, DSOFR, DSOSL, DSOSR, DSOCT, DSOSW, DSOSBL, DSOSBR pins

DSBCKF

DSI**

DSBCKB

DSO**