TC74AC112P/F/FN

2007-10-01

1

TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic

TC74AC112P,TC74AC112F,TC74AC112FN

Dual J-K Flip Flop with Preset and Clear

The TC74AC112 is an advanced high speed CMOS DUAL J-K

FLIP FLOP fabricated with silicon gate and double-layer metal

It achieves the high speed operation similar to equivalent

Bipolar Schottky TTL while maintaining the CMOS low power

dissipation.

In accordance with the logic level given J and K input this

device changes state on negative going transition of the clock

pulse. CLEAR and PRESET are independent of the clock and

accomplished by a low logic level on the corresponding input.

All inputs are equipped with protection circuits against static

discharge or transient excess voltage.

Features

Capability of driving 50

Ω

transmission lines.

• Pin and function compatible with 74F112

Pin Assignment

Note:

xxxFN (JEDEC SOP) is not available in

Japan.

TC74AC112P

TC74AC112F

TC74AC112FN

Weight

DIP16-P-300-2.54A

: 1.00 g (typ.)

SOP16-P-300-1.27A

: 0.18 g (typ.)

SOL16-P-150-1.27

: 0.13 g (typ.)