поискавой системы для электроныых деталей |
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TLP2200 датащи(PDF) 4 Page - Toshiba Semiconductor |
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TLP2200 датащи(HTML) 4 Page - Toshiba Semiconductor |
4 / 7 page TLP2200 2007-10-01 4 Switching Characteristics (unless otherwise specified, Ta = 0~85°C,VCC = 4.5~20V,IF(ON) = 1.6~5mA,IF(OFF) = 0~0.1mA) Characteristic Symbol Test Cir − cuit Test Condition Min. Typ. Max. Unit Without peaking capacitor C1 ― 235 ― Propagation delay time to logic high output level (Note 5) tpLH With peaking capacitor C1 ― ― 400 ns Without peaking capacitor C1 ― 250 ― Propagation delay time to logic low output level (Note 5) tpHL With peaking capacitor C1 ― ― 400 ns Output rise time (10 −90%) tr ― 35 ― ns Output fall time (90 −10%) tf 1 ― ― 20 ― ns Output enable time to logic high tpZH ― ― ― ― ns Output enable time to logic low tpZL ― ― ― ― ns Output disable time from logic high tpHZ ― ― ― ― ns Output disable time from logic low tpLZ 2 ― ― ― ― ns Common mode transient immunity at logic high output (Note 6) CMH IF = 1.6mA, VCM = 50V, Ta = 25°C −1000 ― ― V / μs Common mode transient immunity at logic low output (Note 6) CML 3 IF = 0mA, VCM = 50V, Ta = 25°C 1000 ― ― V / μs (*) All typ. values are at Ta = 25°C, VCC = 5V, IF(ON) = 3mA unless otherwise specified. (Note 4) Duration of output short circuit time should not exceed 10ms. (Note 5) The tpLH propagation delay is measured from the 50% point on the leading edge of the input pulse to the 1.3V point on the leading edge of the output pulse. The tpHL propagation delay is measured from the 50% point on the trailing edge of the input pulse to the 1.3V point on the trailing edge of the output pulse. (Note 6) CML is the maximum rate of rise of the common mode voltage that can be sustained with the output voltage in the logic low state (VO ≤ 0.8V). CMH is the maximum rate of fall of the common mode voltage that can be sustained with the output voltage in the logic high state (VO ≤ 2.0V). |
Аналогичный номер детали - TLP2200 |
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Аналогичное описание - TLP2200 |
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