TC74HC670AP/AF

2007-10-01

1

TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic

TC74HC670AP,TC74HC670AF

4 Word × 4 Bit Register File (3-state)

It achieves the high speed operation similar to equivalent

LSTTL while maintaining the CMOS low power dissipation.

The register file is organized as 4 words of 4 bits each.

Separate read and write address inputs (RA, RB, and WA, WB)

and enable inputs ( RE , WE ) are available permitting

simultaneous writing into one word location and reading from

another location.

Four data inputs (D0~D3) are provided to store the 4-bit words.

The write address inputs (WA, WB) determine the location of

the stored word in the register. When write Enable ( WE ) is held

low, the data is entered into addressed location. When WE is

held high, data and address inputs are inhibited. The data

acquisition from the four registers is made possible by the read

address inputs (RA, RB) when the Read Enable ( RE ) is held low.

When RE is held high the data outputs are in the high impedance

state.

All inputs are equipped with protection circuits against static

discharge or transient excess voltage.

Features

• Output drive capability: 10 LSTTL loads

• Pin and function compatible with 74LS670

Pin Assignment

TC74HC670AP

TC74HC670AF

Weight

DIP16-P-300-2.54A

: 1.00 g (typ.)

SOP16-P-300-1.27A

: 0.18 g (typ.)