L6726A

Pins description and connection diagrams

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2

Pins description and connection diagrams

Figure 3.

Pins connection (top view)

2.1

Pin descriptions

Table 2. Pins descriptions

1

2

3

4

VCC

FB

COMP / DIS

PHASE

LGATE / OC

GND

UGATE

BOOT

5

6

7

8

L6726A

Pin n

Name

Function

1BOOT

HS Driver Supply.

Connect through a capacitor (100nF) to the floating node (LS-Drain) pin

and provide necessary bootstrap diode from VCC.

2

UGATE

HS Driver Output. Connect to HS mosfet gate.

3GND

All internal references, logic and drivers are connected to this pin.

Connect to the PCB ground plane.

4

LGATE / OC

LGATE. LS Driver Output. Connect to LS mosfet gate.

OC. Over Current threshold set. During a short period of time following

VCC rising over UVLO threshold, a 10

µA current is sourced from this pin.

Threshold. The resulting voltage at this pin is sampled and held internally

as the OC set point. Maximum programmable OC threshold is 0.55V. A

voltage greater than 0.75V (max) activates an internal clamp and causes

default threshold.

5VCC

Device and LS Driver power supply.

Operative range from 4.1V to 13.2V. Filter with at least 1

µF MLCC to GND.

6FB

Error Amplifier Inverting Input.

reference.

7

COMP / DIS

compensate the device control loop in conjunction to the FB pin.

During the Soft-Start phase, a 10

µA current is sourced from this pin so the

compensation capacitors also act to program the SS time.

DIS. The device can be disabled by pulling this pin lower than 0.4V (min).

Setting free the pin, the device enables again.

8

PHASE

HS Driver return path, current-reading and adaptive-dead-time monitor.

current. This pin is also used by the adaptive-dead-time control circuitry to

monitor when HS mosfet is OFF.