поискавой системы для электроныых деталей |
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UC2914DWTRG4 датащи(PDF) 9 Page - Texas Instruments |
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UC2914DWTRG4 датащи(HTML) 9 Page - Texas Instruments |
9 / 24 page UC2914 UC3914 SLUS425C − DECEMBER 2003 − REVISED JULY 2004 9 www.ti.com APPLICATION INFORMATION Figure 3 shows typical fault timing waveforms for the external N-channel MOSFET output current, the voltage on the CT pin, and the output load voltage, VOUT, with LR left floating or grounded. UDG−97054 Figure 3. Typical Timing Diagram Table 1. Fault Timing Conditions TIME CONDITION t0 Normal conditions. Output current is nominal, output voltage is at positive rail, VCC t1 Fault control reached. Output current rises above the programmed fault value, CT begins to charge at 100-µA + IPL. t2 Maximum current reached. Output current reaches the programmed maximum level and becomes a constant cur- rent with value IMAX. t3 Fault occurs. CT has charged to 2.5 V, fault output goes low, the FET turns off allowing no output current to flow, VVOUTS discharges to GND. t4 Retry. CT has discharged to 0.5 V, but fault current is still exceeded, CT begins charging again, FET is on, VOUT increases. t5 = t3 Illustrates < 3% duty cycle depending upon RPL selected. t6=t4 t7=t0 Fault released, normal condition. Return to normal operation of the load. |
Аналогичный номер детали - UC2914DWTRG4 |
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Аналогичное описание - UC2914DWTRG4 |
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