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ST6200CM1 датащит (PDF) 5 Page - STMicroelectronics

№ деталь ST6200CM1
подробность  8-BIT OTP/EPROM MCUs WITH A/D CONVERTER, OSCILLATOR SAFEGUARD, SAFE RESET AND 16 PINS
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производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
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ST6200CM1 Datasheet(HTML) 5 Page - STMicroelectronics

 
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ST62T00C/T01C ST62T03C/E01C
1.2 PIN DESCRIPTIONS
VDD and VSS. Power is supplied to the MCU via
these two pins. VDD is the power connection and
VSS is the ground connection.
OSCin and OSCout. These pins are internally
connected to the on-chip oscillator circuit. A quartz
crystal, a ceramic resonator or an external clock
signal can be connected between these two pins.
The OSCin pin is the input pin, the OSCout pin is
the output pin.
RESET. The active-low RESET pin is used to re-
start the microcontroller. Internal pull-up is provid-
ed at this pin.
TEST/V
PP. The TEST must be held at VSS for nor-
mal operation. If TEST pin is connected to a
+12.5V level during the reset phase, the EPROM
programming Mode is entered.
NMI. The NMI pin provides the capability for asyn-
chronous interruption, by applying an external non
maskable interrupt to the MCU. The NMI input is
falling edge sensitive. The user can select as op-
tion the availability of an on-chip pull-up at this pin.
PA1-PA3. These 3 lines are organized as one I/O
port (A). Each line may be configured under soft-
ware control as inputs with or without internal pull-
up resistors, interrupt generating inputs with pull-
up resistors, open-drain or push-pull outputs. PA1-
PA3 can also sink 20mA for direct LED driving.
PB0..PB1,PB3,PB5-PB7. These 6 lines are or-
ganized as one I/O port (B). Each line may be con-
figured under software control as inputs with or
without internal pull-up resistors, interrupt generat-
ing inputs with pull-up resistors, open-drain or
push-pull outputs. PB3,PB5..-PB7 can be used as
analog inputs for the A/D converter on the
ST62T00C, T01C and E01C.
Figure 2. ST62T03C,T00C, T01C, and E01C Pin
Configuration
1
2
3
4
5
6
7
8
11
12
13
14
15
16
VDD
OSCin
OSCout
NMI
VPP/TEST
RESET
Ain*/PB7
Ain*/PB6
VSS
PA1/20 mA Sink
PA2/20 mA Sink
PA3/20 mA Sink
PB0
PB1
PB3/Ain*
PB5/Ain*
*Analog input availability depend on device
10
9
5


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