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TS83C51RC2-VCE датащи(PDF) 8 Page - ATMEL Corporation |
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TS83C51RC2-VCE датащи(HTML) 8 Page - ATMEL Corporation |
8 / 83 page 8 TS8xC51Rx2 4188A–8051–10/02 Pin Description for 64/68 pin Packages Port 4 and Port 5 are 8-bit bidirectional I/O ports with internal pull-ups. Pins that have 1s written to them are pulled high by the internal pull ups and can be used as inputs. As inputs, pins that are externally pulled low will source current because of the internal pull-ups. Refer to the previous pin description for other pins. 14 16 10 I T0 (P3.4): Timer 0 external input 15 17 11 I T1 (P3.5): Timer 1 external input 16 18 12 O WR (P3.6): External data memory write strobe 17 19 13 O RD (P3.7): External data memory read strobe Reset 9 10 4 I Reset: A high on this pin for two machine cycles while the oscillator is running, resets the device. An internal diffused resistor to VSS permits a power-on reset using only an external capacitor to VCC. If the hardware watchdog reaches its time-out, the reset pin becomes an output during the time the internal reset is activated. ALE/PROG 30 33 27 O (I) Address Latch Enable/Program Pulse: Output pulse for latching the low byte of the address during an access to external memory. In normal operation, ALE is emitted at a constant rate of 1/6(1/3inX2mode) theoscillator frequency, and canbeusedfor external timing or clocking. Note that one ALE pulse is skipped during each access to external data memory. This pin is also the program pulse input (PROG)during EPROM programming. ALE can be disabled by setting SFR’s AUXR.0 bit. With this bit set, ALE will be inactive during internal fetches. PSEN 29 32 26 O Program Store ENable: Thereadstrobetoexternalprogram memory. When executing code from the external program memory, PSEN is activated twice each machine cycle, except that two PSEN activations are skipped during each access to external data memory. PSEN is not activated during fetches from internal program memory. EA/VPP 31 35 29 I External Access Enable/Programming Supply Voltage: EA must be externally held low to enable the device to fetch code from external program memory locations 0000H and 3FFFH (RB) or 7FFFH (RC), or FFFFH (RD). If EA is held high, the device executes from internal program memory unless the program counter contains an address greater than 3FFFH (RB) or 7FFFH (RC) EA must be held low for ROMless devices. This pin also receives the 12.75V programming supply voltage (V PP)during EPROM programming. If security level 1 is programmed, EA will be internally latched on Reset. XTAL1 19 21 15 I Crystal 1: Input to the inverting oscillator amplifier and input to the internal clock generator circuits. XTAL2 18 20 14 O Crystal 2: Output from the inverting oscillator amplifier Mnemonic Pin Number Type Name And Function DIL LCC VQFP 1.4 |
Аналогичный номер детали - TS83C51RC2-VCE |
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Аналогичное описание - TS83C51RC2-VCE |
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