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November 2004

s

s

LOW POWER DISSIPATION:

s

HIGH NOISE IMMUNITY:

s

POWER DOWN PROTECTION ON INPUTS

s

SYMMETRICAL OUTPUT IMPEDANCE:

s

BALANCED PROPAGATION DELAYS:

s

OPERATING VOLTAGE RANGE:

s

PIN AND FUNCTION COMPATIBLE WITH

74 SERIES 139

s

IMPROVED LATCH-UP IMMUNITY

DESCRIPTION

The 74VHC139 is an advanced high-speed

CMOS

DUAL

2

TO

4

LINE

DECODER/

DEMULTIPLEXER fabricated with sub-micron

technology.

The active low enable input can be used for gating

or as a data input for demultiplexing applications.

While the enable input is held high, all four outputs

are high independently of the other inputs.

Power down protection is provided on all inputs

and 0 to 7V can be accepted on inputs with no

regard to the supply voltage. This device can be

used to interface 5V to 3V.

All

inputs

and

outputs

are

equipped

with

protection circuits against static discharge, giving

them 2KV ESD immunity and transient excess

voltage.

74VHC139

DUAL 2 TO 4 DECODER/DEMULTIPLEXER

Figure 1: Pin Connection And IEC Logic Symbols

Table 1: Order Codes

PACKAGE

T & R

SOP

74VHC139MTR

TSSOP

74VHC139TTR

TSSOP

SOP

Rev. 4