SN54ACT8997, SN74ACT8997

SCAN-PATH LINKERS WITH 4-BIT IDENTIFICATION BUSES

SCAN-CONTROLLED IEEE STD 1149.1 (JTAG) TAP CONCATENATORS

SCAS157D – APRIL 1990 – REVISED DECEMBER 1996

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POST OFFICE BOX 655303

instruction-register opcode description

The operation of the ’ACT8997 is dependent on the instruction loaded into the IR. Each instruction selects one

of the data registers to be placed between TDI or DTDI and TDO during the Shift-DR TAP state. All the required

instructions of IEEE Standard 1149.1 are implemented in the ’ACT8997.

boundary scan

This instruction implements the required EXTEST and optional INTEST operations of IEEE Standard 1149.1.

The boundary-scan register (which includes the ID-bus register) is placed in the scan path. Data appearing at

input pins included in the boundary-scan register is captured. Data previously loaded into the output pins

included in the boundary-scan register is forced through the outputs.

bypass scan

This instruction implements the required BYPASS operation of IEEE Standard 1149.1. The bypass register is

placed in the scan path and preloads with a logic 0 during Capture-DR.

sample boundary

This instruction implements the required SAMPLE/PRELOAD operation of IEEE Standard 1149.1. The

boundary-scan register is placed in the scan path, and data appearing at the inputs and outputs included in the

boundary-scan register is sampled on the rising edge of TCK in Capture-DR.

count

The counter register begins counting on each DCI transition. The count begins from the value present in the

register before the count instruction was loaded. The counter can be configured by the control register to count

up or down on either the low-to-high or high-to-low transition of DCI. Counting occurs only while in the

Run-Test /Idle TAP state.

control-register scan

The control register is placed in the scan path for a subsequent shift operation. The register is not preloaded

during Capture-DR.

counter-register scan

The counter register is placed in the scan path. During Capture-DR, the current value of the counter is loaded

in the counter register. At Update-DR, the newly shifted value is preloaded to the counter.

counter-register read

The counter register is placed in the scan path. During Capture-DR, the prior preload value of the counter is

loaded into the counter register. At Update-DR, the newly shifted value is preloaded to the counter.

ID-bus-register scan

The ID-bus register (a subset of the boundary-scan register) is placed in the scan path for a subsequent shift

operation. The data appearing on the ID bus is loaded into the ID-bus register on the rising edge of TCK in

Capture-DR.

ID-bus-register read

The ID-bus register is placed in the scan path for a subsequent shift operation. The register is not preloaded

during Capture-DR.

select-register scan

The select register is placed in the scan path for a subsequent shift operation. The register is not preloaded

during Capture-DR.