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ISL12024IRTCZ датащи(PDF) 11 Page - Intersil Corporation |
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ISL12024IRTCZ датащи(HTML) 11 Page - Intersil Corporation |
11 / 24 page 11 FN6749.0 August 8, 2008 Alarm Registers (Non-Volatile) Alarm0 and Alarm1 The alarm register bytes are set up identical to the RTC register bytes, except that the MSB of each byte functions as an enable bit (enable = “1”). These enable bits specify which alarm registers (seconds, minutes, etc.) are used to make the comparison. Note that there is no alarm byte for year. The alarm function works as a comparison between the alarm registers and the RTC registers. As the RTC advances, the alarm will be triggered once a match occurs between the alarm registers and the RTC registers. Any one alarm register, multiple registers, or all registers can be enabled for a match. See “Device Operation” on page 12 and “Application Section” on page 20 for more information. Control Registers (Non-Volatile) The Control Bits and Registers described in the following are non-volatile. BL Register BP2, BP1, BP0 - Block Protect Bits The Block Protect Bits, BP2, BP1 and BP0, determine which blocks of the array are write protected. A write to a protected block of memory is ignored. The block protect bits will prevent write operations to one of eight segments of the array. The partitions are described in Table 3. INT Register: Interrupt Control and Frequency Output Register IM, AL1E, AL0E - Interrupt Control and Status Bits There are two Interrupt Control bits; Alarm 1 Interrupt Enable (AL1E) and Alarm 0 Interrupt Enable (AL0E) to specifically enable or disable the alarm interrupt signal output (IRQ/FOUT). The interrupts are enabled when either the AL1E or AL0E or both bits are set to ‘1’ and both the FO1 and FO0 bits are set to 0 (FOUT disabled). The IM bit enables the pulsed interrupt mode. To enter this mode, the AL0E or AL1E bits are set to “1”, and the IM bit to “1”. The IRQ/FOUT output will now be pulsed each time an alarm occurs. This means that once the interrupt mode alarm is set, it will continue to alarm for each occurring match of the alarm and present time. This mode is convenient for hourly or daily hardware interrupts in microcontroller applications such as security cameras or utility meter reading. In this case both Alarms are enabled. FO1, FO0 - Programmable Frequency Output Bits These are two output control bits. They select one of three divisions of the internal oscillator, that is applied to the IRQ/FOUT output pin. Table 4 shows the selection bits for this output. When using this function, the Alarm output function is disabled.FO1 and FO0 are set to “01” for 32.768kHz output at power-up. Oscillator Compensation Registers There are two trimming options. • ATR. Analog Trimming Register • DTR. Digital Trimming Register These registers are non-volatile. The combination of analog and digital trimming can give up to -64ppm to +110 ppm of total adjustment. ATR Register - ATR5, ATR4, ATR3, ATR2, ATR1, ATR0: Analog Trimming Register Six analog trimming bits, ATR0 to ATR5, are provided in order to adjust the on-chip load capacitance value for frequency compensation of the RTC. Each bit has a different weight for capacitance adjustment. For example, using a Citizen CFS-206 crystal with different ATR bit combinations provides an estimated ppm adjustment range from -34ppm to +80ppm to the nominal frequency compensation. The effective on-chip series load capacitance, CLOAD, ranges from 4.5pF to 20.25pF with a mid-scale value of 12.5pF (default). CLOAD is changed via two digitally controlled capacitors, CX1 and CX2, connected from the X1 and X2 pins to ground (see Figure 8). The value of CX1 and CX2 is given Equation 1: TABLE 3. PROTECTED ADDRESSES ISL12024IRTCZ ARRAY LOCK 0 0 0 None (Default) None 0 0 1 180h – 1FFh Upper 1/4 0 1 0 100h – 1FFh Upper 1/2 0 1 1 000h – 1FFh Full Array 1 0 0 000h – 03Fh First 4 Pages 1 0 1 000h – 07Fh First 8 Pages 1 1 0 000h – 0FFh First 16 Pages 1 1 1 000h – 1FFh Full Array TABLE 4. PROGRAMMABLE FREQUENCY OUTPUT BITS FO1 FO0 OUTPUT FREQUENCY 0 0 Alarm output (FOUT disabled) 0 1 32.768kHz (default setting) 1 0 4096Hz 11 1Hz C X 16 b5 ⋅ 8b4 4 b3 2b2 1 b1 0.5b0 9 + ⋅ + ⋅ + ⋅ + ⋅ + ⋅ + ()pF = (EQ. 1) ISL12024IRTCZ |
Аналогичный номер детали - ISL12024IRTCZ |
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Аналогичное описание - ISL12024IRTCZ |
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