Rev 1.0, August 14, 2008

Page 8 of 16

SL15300

Output Rise/Fall Time

tr/f5

Programmable, VDD=2.5

CL=15pF, 20 to 80% of VDD

-

1.10

1.35

ns

Output Rise/Fall Time

tr/f6

Programmable, VDD=2.5

CL=15pF, 20 to 80% of VDD

-

0.90

1.10

ns

Output Rise/Fall Time

tr/f7

Programmable, VDD=2.5

CL=15pF, 20 to 80% of VDD

-

0.70

0.85

ns

Cycle-to-Cycle Jitter

(SSCLK – Pins 4/6/7/8 )

CCJ1

FIN=30MHz, all 4 clocks are at

33MHz, +/-2.0% Spread. CL=15pF

-

TBD

TBD

ps

Cycle-to-Cycle Jitter

(SSCLK – Pins 4/6/7/8)

CCJ2

FIN=30MHz, all 4 clocks are at

33MHz, +/-2.0% Spread. CL=15pF

-

TBD

TBD

ps

Power-down Time

tPD

Time from PD# falling edge to Hi-Z

at outputs (Asynchronous)

-

150

350

ns

Power-up Time

(Crystal or Clock)

tPU

Time from PD# rising edge to valid

frequency at outputs

(Asynchronous)

-

3.5

5.0

ms

Power Supply Ramp

Time

tPSR

Time for VDD reaching minimum

specified value and monolithic

power supply ramp

-

-

12

ms

Output Enable Time

tOE

Time from OE falling edge to Hi-Z at

outputs (Asynchronous)

-

180

350

ns

Output Disable Time

tOD

Time from OE falling edge to Hi-Z at

outputs (Asynchronous)

-

180

350

ns

Spread Percent Range

SPR-1

Center Spread, SSCLK-1/2/3/4

+/-0.125

-

+/-2.5

%

Spread Percent Range

SPR-2

Down Spread, SSCLK-1/2/3/4

-5.0

-

-0.25

%

Spread Percent Variation

ΔSS%

Variation of programmed Spread %

-15

-

15

%

Modulation Frequency

FMOD

Programmable, 31.5 kHz standard

25

31.5

120

kHz

DC Electrical Characteristics (I-Grade)

Unless otherwise stated VDD= 3.3V+/- 10%, CL=15pF and Ambient Temperature range -40 to +85 Deg C

Description

Symbol

Condition

Min

Typ

Max

Unit

Operating Voltage

VDD

VDD+/-10%

2.97

3.3

3.63

V

Input Low Voltage

VIL

CMOS Level, if Pins 4 and 8

programmed as PD#, OE,

SSON# or FS

0

-

0.3VDD

V

Input High Voltage

VIH

CMOS Level, if Pins 4 and 8

programmed as PD#, OE,

SSON# or FS.

0.7VDD

-

VDD

V

Output High Voltage

VOH1

IOH=10mA , If Pins 4, 6, 7 and

8 are programmed as

SSCLK/REFCLK

VDD-0.5

-

-

V

Output Low Voltage

VOL1

IOL=10mA, If Pins 4, 6, 7 and 8

are programmed as

SSCLK/REFCLK

-

-

0.5

V