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74AUP1G79 датащи(PDF) 11 Page - NXP Semiconductors |
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74AUP1G79 датащи(HTML) 11 Page - NXP Semiconductors |
11 / 20 page 74AUP1G79_3 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 03 — 3 August 2009 11 of 20 NXP Semiconductors 74AUP1G79 Low-power D-type flip-flop; positive-edge trigger [1] All typical values are measured at nominal VCC. [2] tpd is the same as tPLH and tPHL. [3] CPD is used to determine the dynamic power dissipation (PD in µW). PD =CPD × VCC2 × fi × N+ Σ(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; Σ(C L × VCC 2 × f o) = sum of the outputs. 12. Waveforms CPD power dissipation capacitance fi = 1 MHz; VI = GND to VCC [3] VCC = 0.8 V - 1.6 - - - - - pF VCC = 1.1 V to 1.3 V - 1.7 - - - - - pF VCC = 1.4 V to 1.6 V - 1.8 - - - - - pF VCC = 1.65 V to 1.95 V - 1.9 - - - - - pF VCC = 2.3 V to 2.7 V - 2.3 - - - - - pF VCC = 3.0 V to 3.6 V - 2.7 - - - - - pF Table 8. Dynamic characteristics …continued Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 9. Symbol Parameter Conditions 25 °C −40 °C to +125 °C Unit Min Typ[1] Max Min (85 °C) Max (85 °C) Min (125 °C) Max (125 °C) Measurement points are given in Table 9. Logic levels: VOL and VOH are typical output voltage drops that occur with the output load. Fig 7. The clock input (CP) to output (Q) propagation delays mna443 CP input Q output tPHL tPLH VM VM VOH VI GND D input VI GND VOL VM VM |
Аналогичный номер детали - 74AUP1G79 |
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Аналогичное описание - 74AUP1G79 |
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