74AVC1T45_2

© NXP B.V. 2009. All rights reserved.

Product data sheet

Rev. 02 — 5 May 2009

3 of 21

NXP Semiconductors

74AVC1T45

Dual supply translating transceiver; 3-state

6.

Pinning information

6.1 Pinning

6.2 Pin description

7.

Functional description

[1]

H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.

[2]

The input circuit of the data I/O is always active.

[3]

[4]

Fig 3.

Pin configuration SOT363

Fig 4.

Pin configuration SOT886

74AVC1T45

GND

AB

001aag971

1

2

3

6

DIR

5

4

74AVC1T45

GND

001aag972

A

DIR

B

Transparent top view

2

3

1

5

4

6

Table 3.

Pin description

Symbol

Pin

Description

1

supply voltage port A and DIR

GND

2

ground (0 V)

A

3

data input or output

B

4

data input or output

DIR

5

direction control

6

supply voltage port B

Table 4.

Function table[1]

Supply voltage

Input

Input/output[2]

DIR[3]

A

B

0.8 V to 3.6 V

L

A = B

input

0.8 V to 3.6 V

H

input

B = A

GND[4]

XZ

Z