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74LVC1G00 датащи(PDF) 6 Page - NXP Semiconductors

номер детали 74LVC1G00
подробное описание детали  Single 2-input NAND gate
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производитель  NXP [NXP Semiconductors]
домашняя страница  http://www.nxp.com
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74LVC1G00 датащи(HTML) 6 Page - NXP Semiconductors

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74LVC1G00_7
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 07 — 17 July 2007
6 of 14
NXP Semiconductors
74LVC1G00
Single 2-input NAND gate
11. Dynamic characteristics
[1]
Typical values are measured at Tamb =25 °C and VCC = 1.8 V, 2.5 V, 2.7 V, 3.3 V and 5.0 V respectively.
[2]
tpd is the same as tPLH and tPHL.
[3]
CPD is used to determine the dynamic power dissipation (PD in µW).
PD =CPD × VCC2 × fi × N+ ∑(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
∑(C
L × VCC
2
× f
o) = sum of outputs.
12. Waveforms
Table 8.
Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); for load circuit see Figure 8.
Symbol Parameter
Conditions
−40 °C to +85 °C
−40 °C to +125 °C Unit
Min
Typ[1]
Max
Min
Max
tpd
propagation delay
A, B to Y; see Figure 7
[2]
VCC = 1.65 V to 1.95 V
1.0
3.3
8.0
1.0
10.5
ns
VCC = 2.3 V to 2.7 V
0.5
2.2
5.5
0.5
7.0
ns
VCC = 2.7 V
0.5
2.6
5.8
0.5
7.5
ns
VCC = 3.0 V to 3.6 V
0.5
2.2
4.7
0.5
6.0
ns
VCC = 4.5 V to 5.5 V
0.5
1.8
4.0
0.5
5.5
ns
CPD
power dissipation
capacitance
VI = GND to VCC;
VCC = 3.3 V
[3]
-14-
-
-
pF
Measurement points are given in Table 9.
VOL and VOH are typical output voltage levels that occur with the output.
Fig 7.
The input (A and B) to output (Y) propagation delay times
mna612
tPHL
tPLH
VM
VM
A, B input
Y output
GND
VI
VOH
VOL


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