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TPIC8101DWG4 датащи(PDF) 7 Page - Texas Instruments

номер детали TPIC8101DWG4
подробное описание детали  KNOCK SENSOR INTERFACE
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TPIC8101DWG4 датащи(HTML) 7 Page - Texas Instruments

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TPIC8101
KNOCK SENSOR INTERFACE
SLIS110A − APRIL 2003 − REVISED MAY 2005
7
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
ac electrical characteristics, VDD = 5 V ±5%, TA = −40°C to 125°C (unless otherwise specified)
DESCRIPTION
MIN
TYP
MAX
UNITS
fSPI
SPI frequency
5
MHz
t1
Time from CS falling edge to SCLK rising edge
10
ns
t2
Time from CS falling edge to SCLK falling edge
80
ns
t3
Time for SCLK to go high
60
ns
t4
Time for SCLK to go low
60
ns
t5
Time from last SCLK falling edge to CS rising edge
80
ns
t6
Time from SDI valid to falling edge of SCLK
60
ns
t7
Time for SDI valid after falling edge of SCLK
10
ns
t8
Time after CS rises until INT/HOLD to go high
8
ns
t9
Time between two words for transmitting
170
ns
t10
Time for SDO valid after SDI on bus, at VDD = 5 V and load = 20 pF
40
ns
LSB
LSB
1
2
3
1
2
3
4
4
5
5
6
6
MSB
MSB
XXX
XXX
SCLK
SDI
SDO
INT/HOLD
t3
t2
t1
t4
t1
t9
t5
t8
t7
t6
t10
CS
Figure 1. Serial Peripherial Interface (SPI)
This is an 8-bit SPI protocol used to communicate with the microcontroller in the system for setting various
operating parameters.
When CS is held high, the signals on the SCLK and SDI lines are ignored and SDO is forced into a
high-impedance state. SCLK must be low when CS is asserted low.
On each falling edge of the SCLK pulse after CS is asserted low, the new byte is serially shifted into the register.
The most significant bit (MSB) is shifted first. Only eight bits in a frame are acceptable. When a number of bits
shifted is different than the value eight, the information is ignored and the register retains the old setting.
The shift register transfers the data into a latch register after the eighth SCLK clock pulse and when CS
transitions from low to high (see Figure 1).
The function of the integration mode is to ignore any SPI frame transmission when the INT/HOLD bit = 1. In the
hold mode with INT/HOLD = 0, all necessary bytes may be transmitted.


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