74AHC_AHCT377_2

© NXP B.V. 2008. All rights reserved.

Product data sheet

Rev. 02 — 12 June 2008

4 of 16

NXP Semiconductors

74AHC377; 74AHCT377

Octal D-type flip-flop with data enable; positive-edge trigger

5.

Pinning information

5.1 Pinning

5.2 Pin description

Fig 5.

Pin configuration SO20 and TSSOP20

377

Q0

Q7

D0

D7

D1

D6

Q1

Q6

Q2

Q5

D2

D5

D3

D4

Q3

Q4

GND

CP

mna917

1

2

3

4

5

6

7

8

9

10

12

11

14

13

16

15

18

17

20

19

Table 2.

Pin description

Symbol

Pin

Description

E

1

data enable input (active LOW)

Q0

2

flip-flop output

D0

3

data input

D1

4

data input

Q1

5

flip-flop output

Q2

6

flip-flop output

D2

7

data input

D3

8

data input

Q3

9

flip-flop output

GND

10

ground (0 V)

CP

11

clock input (LOW-to-HIGH, edge triggered)

Q4

12

flip-flop output

D4

13

data input

D5

14

data input

Q5

15

flip-flop output

Q6

16

flip-flop output

D6

17

data input

D7

18

data input

Q7

19

flip-flop output

20

supply voltage