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74HC237DB датащи(PDF) 8 Page - NXP Semiconductors |
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74HC237DB датащи(HTML) 8 Page - NXP Semiconductors |
8 / 17 page 74HC237 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 4 — 10 January 2011 8 of 17 NXP Semiconductors 74HC237 3-to-8 line decoder, demultiplexer with address latches Measurement points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load. Fig 8. Propagation enable inputs (E1) to output (Yn) and output transition time 001aab874 E1 input Yn output VM tPHL tTHL tTLH tPLH VM Measurement points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load. Fig 9. The data input (An) to latch enable input (LE) set-up times, latch enable input (LE) to data input (An) hold times and latch enable input (LE) pulse width tsu th LE input VM VM 001aab875 th tsu tW An input transparant transparant latched latched Table 8. Measurement points Type Input Output VM VM 74HC237 0.5VCC 0.5VCC |
Аналогичный номер детали - 74HC237DB |
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Аналогичное описание - 74HC237DB |
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