AN-8024

APPLICATION NOTE

© 2009 Fairchild Semiconductor Corporation

www.fairchildsemi.com

Rev. 1.0.1 • 9/18/09

7

changing the system transfer functions as the load current

decreases and/or input voltage increases.

One simple and practical way to address this problem is

designing the feedback loop for low input voltage and full

load condition with enough phase and gain margin. When

the converter operates in CCM, the RHP zero is lowest in

low input voltage and full load condition. The gain increases

only about 6dB as the operating condition is changed from

the lowest input voltage to the highest input voltage

condition under universal input condition. When the

operating mode changes from CCM to DCM, the RHP zero

disappears, making the system stable. Therefore, by

designing the feedback loop with more than 45 degrees

phase margin in low input voltage and full load condition,

the stability over all the operating ranges can be guaranteed.

Figure 9 is a typical feedback circuit mainly consisting of a

adjusted for control-loop compensation. The maximum

source current of the FB pin is about 1mA. The

phototransistor must be capable of sinking this current to

determined as:

−−

⋅>

OOPD

KA

FB

D

VV

V

CTR I

R

(22)

and CTR is the current transfer rate of the opto-coupler.

Figure 9. Feedback Circuit

The feedback compensation network transfer function of

Figure 9 is obtained as:

ˆ

1/

ˆ

1/

ZC

FB

I

oPC

s

v

vs

s

ω

ω

ω

+

=−

⋅

+

(23)

where

1

FB

I

D

F

R

R RC

,

1

1

()

ZC

F

F

R

RC

+

, and

1

PC

FBFB

R C

.

series (5k

10.

(Design Example)

Assuming CTR is 100%,

3

33

110

51.2

2.5

1.3

110

1 10

−

−−

−

−

⋅> ×

−−

−−

<

==

Ω

×

×

OOPD

KA

D

OOPD

KA

D

VV

V

CTR

R

VV

V

R

k

The minimum cathode current for KA431 is 1mA.

3

1.2

110

−

<

=Ω

×

OPD

BIAS

V

R

k

1k

are selected as 20k

Ω and 20kΩ.

[STEP-11] Design Input Voltage Sensing Circuit

Figure 10 shows a resistive voltage divider with low-pass

voltage is used for brownout protection, which triggers when

is introduced for brownout protection to prevent false

triggering by the voltage ripple on the input capacitor.

Figure 10.Input Voltage Sensing