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FAN5234MTCX датащи(PDF) 7 Page - Fairchild Semiconductor

номер детали FAN5234MTCX
подробное описание детали  Dual Mobile-Friendly PWM / PFM Controller
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производитель  FAIRCHILD [Fairchild Semiconductor]
домашняя страница  http://www.fairchildsemi.com
Logo FAIRCHILD - Fairchild Semiconductor

FAN5234MTCX датащи(HTML) 7 Page - Fairchild Semiconductor

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© 2004 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FAN5234 • Rev. 2.0.0
7
Functional Description
Overview
The FAN5234 is a PWM controller intended for low-
voltage power applications in notebook, desktop, and
sub-notebook PCs. The output voltage of the controller
can be set in the range of 0.9V to 5.5V by an external
resistor divider.
The synchronous buck converter can operate from an
unregulated DC source (such as a notebook battery),
with voltage ranging from 2V to 24V, or from a regulated
system rail. In either case, the IC is biased from a +5V
source. The PWM modulator uses an average-current-
mode control with input voltage feed-forward for
simplified feedback loop compensation and improved
line regulation. The controller includes integrated
feedback loop compensation that dramatically reduces
the number of external components.
Depending on the load level, the converter can operate
in fixed-frequency PWM Mode or in Hysteretic Mode.
Switch-over from PWM to Hysteretic Mode improves the
converters' efficiency at light loads and prolongs battery
run time. In Hysteretic Mode, a comparator is
synchronized to the main clock to allow seamless
transition between the operational modes and reduced
channel-to-channel interaction.
The Hysteretic Mode of operation can be inhibited
independently using the FPWM pin if variable frequency
operation is not desired.
Oscillator
Table 1. Converter Operating Modes
Mode
fSW Converter Power
VIN Pin
Battery
300
2 to 24V
Battery (>5V)
Fixed 300
300
<5.5V Fixed
100K
Ω to GND
Fixed 600
600
<5.5V Fixed
GND
When VIN is from the battery, the oscillator ramp
amplitude is proportional to VIN, providing voltage feed-
forward control for improved loop response. When in
either of the fixed modes, oscillator ramp amplitude is
fixed. The operating frequency is determined according
to the connection on the VIN pin (see Table 1).
Initialization and Soft Start
Assuming EN is HIGH, FAN5234 is initialized when VCC
exceeds the rising UVLO threshold. Should VCC drop
below the UVLO threshold, an internal power-on reset
function disables the chip.
The voltage at the positive input of the error amplifier is
limited by the voltage at the SS pin, which is charged
with 5mA current source. Once CSS has charged to VREF
(0.9V), the output voltage is in regulation. The time it
takes SS to reach 0.9V is:
5
xC
9
.
0
t
SS
9
.
0
=
(1)
where t0.9 is in seconds if CSS is in µF.
When SS reaches 1.5V, the power-good outputs are
enabled and Hysteretic Mode is allowed. The converter
is forced into PWM Mode during soft-start.
Operation Mode Control
The mode-control circuit changes the converter’s mode
from PWM to Hysteretic and vice versa based on the
voltage polarity of the SW node when the lower
MOSFET is conducting and just before the upper
MOSFET turns on. For continuous inductor current, the
SW node is negative when the lower MOSFET is
conducting and the converters operate in fixed-
frequency PWM Mode, as shown in Figure 4. This
mode achieves high efficiency at nominal load. When
the load current decreases to the point where the
inductor current flows through the lower MOSFET in the
“reverse” direction, the SW node becomes positive and
the mode is changed to Hysteretic, which achieves
higher efficiency at low currents by decreasing the
effective switching frequency.
To prevent accidental mode change or "mode chatter,"
the transition from PWM to Hysteretic Mode occurs
when the SW node is positive for eight consecutive
clock cycles (see Figure 4). The polarity of the SW node
is sampled at the end of the lower MOSFET conduction
time. At the transition between PWM and Hysteretic
Mode, both the upper and lower MOSFETs are turned
off. The SW node “rings” based on the output inductor
and the parasitic capacitance on the SW node and
settles out at the value of the output voltage.
The boundary value of inductor current, where current
becomes discontinuous, is estimated by the following:
⎟⎟
⎜⎜
=
IN
OUT
SW
OUT
OUT
IN
)
DIS
(
LOAD
V
L
f
2
V
)
V
V
(
I
(2)
Hysteretic Mode
Conversely, the transition from Hysteretic Mode to
PWM Mode occurs when the SW node is negative for
eight consecutive cycles.
A sudden increase in the output current causes a
change from Hysteretic to PWM Mode. This load
increase causes an instantaneous decrease in the
output voltage due to the voltage drop on the output
capacitor ESR. If the load causes the output voltage (as
presented at VSEN) to drop below the hysteretic
regulation level (20mV below VREF), the mode is
changed to PWM on the next clock cycle.
In Hysteretic Mode, the PWM comparator and the error
amplifier that provide control in PWM Mode are
inhibited and the hysteretic comparator is activated. In
Hysteretic Mode the low-side MOSFET is operated as a
synchronous rectifier, where the voltage across
(VDS(ON)) is monitored and it is switched off when VDS(ON)
goes positive (current flowing back from the load),
allowing the diode to block reverse conduction.


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