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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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CS1501 датащи(PDF) 10 Page - Cirrus Logic |
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CS1501 датащи(HTML) 10 Page - Cirrus Logic |
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10 / 11 page  CS1501 10 DS927PP6 5.3 Burst Mode Burst mode is utilized to improve system efficiency when the system output power (Po) is <5% of nominal. Burst mode is implemented by intermittently disabling the PFC over a full half-line period under light-load conditions, as shown in Figure 15. Figure 15. Burst Mode 5.4 Output Power and PFC Boost Inductor In normal operating mode, the nominal output power is estimated by the following equation. where: Po rated output power of the system efficiency of the boost converter (estimated as 100% by the PFC algorithm) Vin(min) minimum RMS line voltage is 90V, measured after the rectifier and EMI filter Vlink nominal PFC output voltage (must be 400V) fmax maximum switching frequency is 70kHz LB boost inductor specified by rated power requirement <1 margin factor to guarantee rated output power (Po) against boost inductor tolerances. Equation 1 is provided for explanation purposes only. Using substituted required design values for Vlink and fmax gives the following equation: Changing the value for the Vlink voltage is not recommended. Solving Equation 2 for the PFC boost inductor, LB, gives the following equation: If a value of the boost inductor other than that obtained from Equation 3 above is used, the total output power capability as well as the minimum input voltage threshold will differ according to Equation 2. Note that if the input voltage drops below 90Vrms and the inductance value is <LB, the link voltage Vlink will drop below 400V and fall out of regulation. Figure 16. Relative Effects of Varying Boost Inductance 5.5 PFC Output Capacitor The value of the PFC output capacitor should be chosen based upon voltage ripple and hold-up requirements. To ensure system stability with the digital controller, the recommended value of the capacitor is within the range of 0.5 F/watt to 2.0F/watt with a Vlink voltage of 400V. 5.6 Output IFB Sense & Input IAC Sense A current proportional to the PFC output voltage, Vlink, is supplied to the IC on pin IFB and is used as a feedback control signal. This current is compared against an internal fixed-value reference current. The ADC is used to measure the magnitude of the IIFB current through resistor RIFB. The magnitude of the IIFB current is then compared to an internal reference current (Iref) of 129A. Figure 17. IFB Input Pin Model Vin [V] t [ms] FET Vgs Burst Mode Active Vin Po [W] t [ms] PFC Disable Burst Threshold Po Vin min 2 Vlink Vin min 2 – 2fmax LB Vlink --------------------------------------------------------- = [Eq.1] Po 90V 2 400V 90V 2 – 270kHz LB 400V ------------------------------------------------------------- = [Eq.2] LB 90V 2 400V 90V 2 – 270kHz Po 400V ------------------------------------------------------------- = [Eq.3] VAC(rms) 90 265 L > LB L = LB L < LB IFB VDD 15k 8 Vlink CS1501 24k ADC R5 RIFB IFB R6 1 Iref |
Аналогичный номер детали - CS1501 |
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Аналогичное описание - CS1501 |
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