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KMB001 датащи(PDF) 6 Page - Intersil Corporation |
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KMB001 датащи(HTML) 6 Page - Intersil Corporation |
6 / 7 page Application Note 1434 6 AN1434.4 March 31, 2011 Runtime X.X Installer Information window, click OK. The InstallShield Wizard Completed window appears. 9. In the InstallShield Wizard Completed window, click Finish. The MATLAB component runtime installation is now complete. Running the Intersil Konverter Analyzer Software To run the Intersil Konverter Analyzer software: 1. On the desktop, double-click the Intersil Konverter Analyzer shortcut icon. The application uncompresses the first time it runs; subsequently, it starts immediately. 2. If the Welcome to the Found New Hardware Wizard window opens, click the No, not this time radio button and then click Next. 3. If the Hardware Installation window opens, click Continue Anyway. Specifications Definitions Analog Input Bandwidth is the analog input frequency at which the spectral output power at the fundamental frequency (as determined by FFT analysis) is reduced by 3dB from its low-frequency value. This is also referred to as Full Power Bandwidth. Aperture Delay or Sampling Delay is the time required after the rise of the clock input for the sampling switch to open, at which time the signal is held for conversion. Aperture Jitter is the RMS variation in aperture delay for a set of samples. Clock Duty Cycle is the ratio of the time the clock wave is at logic high to the total time of one clock period. Differential Non-Linearity (DNL) is the deviation of any code width from an ideal 1 LSB step. Effective Number of Bits (ENOB) is an alternate method of specifying Signal to Noise-and-Distortion Ratio (SINAD). In dB, it is calculated as: ENOB = (SINAD - 1.76)/6.02 Integral Non-Linearity (INL) is the deviation of each individual code from a line drawn from zero (1/2 LSB below the first code transition) through positive full-scale (1/2 LSB above the last code transition). The deviation of any given code from this line is measured from the center of that code. Least Significant Bit (LSB) is the bit that has the smallest value or weight in a digital word. Its value in terms of input voltage is VFS/2N-1 where N is the resolution in bits. Missing Codes are output codes that are skipped and will never appear at the ADC output. These codes cannot be reached with any input value. Most Significant Bit (MSB) is the bit that has the largest value or weight. Its value in terms of input voltage is VFS/2. Pipeline Delay is the number of clock cycles between the initiation of a conversion and the appearance of the data at the output pins. Power Supply Rejection Ratio (PSRR) is the ratio of a change in input offset voltage to a change in power supply voltage. Signal to Noise-and-Distortion (SINAD) is the ratio of the RMS signal amplitude to the RMS value of the sum of all other spectral components below one-half the clock frequency, including harmonics but excluding DC. Signal-to-Noise Ratio (without Harmonics) is the ratio of the RMS signal amplitude to the sum of all other spectral components below one-half the sampling frequency, excluding harmonics and DC. Spurious-Free-Dynamic Range (SFDR) is the ratio of the RMS signal amplitude to the RMS value of the peak spurious spectral component. The peak spurious spectral component may or may not be a harmonic. Appendix A Source Requirements Source jitter and noise will degrade performance. For best test results, a combined jitter (for both clock and signal sources) that does not exceed 200fs is recommended. Sample Clock and Input Signal Source Setup Sample clock settings: • 50MHz to 500MHz sine, +10dBm Signal settings: • 0.4MHz to 250MHz, +7dBm to +10dBm (depending on analog input attenuation) |
Аналогичный номер детали - KMB001 |
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Аналогичное описание - KMB001 |
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