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GS1574 датащи(PDF) 3 Page - Gennum Corporation |
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GS1574 датащи(HTML) 3 Page - Gennum Corporation |
3 / 18 page GS1574 Data Sheet 28854 - 5 May 2007 3 of 18 1. Pin Out 1.1 GS1574 Pin Assignment Figure 1-1: 16-Pin QFN 1.2 GS1574 Pin Descriptions GS1574 (top view) 1 VEE_A VEE_A SDI SDI 2 3 4 SDO SDO VEE_D VEE_D 12 11 10 9 5 7 68 13 14 15 16 Center Pad (bottom of package, internally bonded to VEE_A) Table 1-1: GS1574 Pin Descriptions Pin Number Name Timing Type Description 1, 4 VEE_A Analog Power Most negative power supply for analog circuitry. Connect to analog GND. 2, 3 SDI, SDI Analog Input Serial digital differential input. 5, 6 AGC, AGC Analog – External AGC capacitor. Connect pin 5 and pin 6 together as shown in Typical Application Circuit A. 7 BYPASS Not Synchronous Input Forces the Equalizing and DC RESTORE stages into bypass mode when HIGH. No equalization occurs in this mode. 8 MCLADJ Analog Input Maximum cable length adjust. Adjusts the approximate maximum amount of cable to be equalized (from 0m to the maximum cable length). The output is muted (latched to the last state) when the maximum cable length is achieved. NOTE: MCLADJ is only recommended for data rates up to 360Mb/s. For data rates above this, MCLADJ should be left floating. 9 VEE_D Analog Power Most negative power supply for the digital circuitry and output buffer. Connect to digital GND. 10, 11 SDO, SDO Analog Output Equalized serial digital differential output. |
Аналогичный номер детали - GS1574 |
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Аналогичное описание - GS1574 |
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