LC87F7CC8A

No.A0147-11/21

Allowable Operating Range at Ta = -20°C to +70°C, VSS1 = VSS2 = VSS3 = 0V

Specification

Parameter

Symbol

Pin/Remarks

Conditions

VDD [V]

min

typ

max

unit

VDD(1)

0.245µs

≤ tCYC≤ 200µs

4.5

5.5

VDD(2)

0.294µs

≤ tCYC≤ 200µs

2.8

5.5

Operating

supply voltage

range

(Note2-1)

VDD(3)

VDD1=VDD2=VDD3

0.735µs

≤ tCYC≤ 200µs

2.2

5.5

Supply

voltage range

in Hold mode

VHD

VDD1

Keep RAM and register data in

HOLD mode.

2.0

5.5

VIH(1)

• Ports 0, 8

• Ports A, B, D, E, L

Output disable

2.2 to 5.5

0.3VDD

+0.7

VDD

VIH(2)

• Port 1

• Ports 71, 72, 73

• P70

port input/interrupt

Output disable

2.2 to 5.5

0.3VDD

+0.7

VDD

VIH(3)

P87 small signal input

Output disable

2.2 to 5.5

0.75VDD

VDD

VIH(4)

Port 70

Watchdog timer

Output disable

2.2 to 5.5

0.9VDD

VDD

Input high

voltage

VIH(5)

XT1, XT2, CF1, RES

2.2 to 5.5

0.75VDD

VDD

VIL(1)

4.0 to 5.5

VSS

0.15VDD

+0.4

VIL(2)

• Ports 0, 8

• Ports A, B, D, E, L

Output disable

2.2 to 4.0

VSS

0.2VDD

VIL(3)

4.0 to 5.5

VSS

0.1VDD

+0.4

VIL(4)

• Port 1

• Ports 71, 72, 73

• P70 port

input/interrupt

Output disable

2.2 to 4.0

VSS

0.2VDD

VIL(5)

Port 87 small signal

Input

Output disable

2.2 to 5.5

VSS

0.25VDD

VIL(6)

Port 70

Watchdog timer

Output disable

2.2 to 5.5

VSS

0.8VDD

-1.0

Input low

voltage

VIL(7)

XT1, XT2, CF1, RES

2.8 to 5.5

VSS

0.25VDD

V

4.5 to 5.5

0.245

200

2.8 to 5.5

0.294

200

Operation

cycle time

(Note 2-2)

tCYC

2.2 to 5.5

0.735

200

µs

4.5 to 5.5

0.1

12

2.8 to 5.5

0.1

10

• CF2 open

• system clock divider :1/1

• external clock DUTY = 50 ± 5%

2.2 to 5.5

0.1

4

4.5 to 5.5

0.2

24.4

2.8 to 5.5

0.2

20

External

system clock

frequency

FEXCF(1)

CF1

• CF2 open

• system clock divider :1/2

2.2 to 5.5

0.2

8

MHz

FmCF(1)

12MHz ceramic resonator

oscillation

See Fig. 1.

4.5 to 5.5

12

FmCF(2)

10MHz ceramic resonator

oscillation

See Fig. 1.

2.8 to 5.5

10

FmCF(3)

CF1, CF2

4MHz ceramic resonator

oscillation

See Fig. 1.

2.2 to 5.5

4

FmRC

RC oscillation

2.2 to 5.5

0.3

1.0

2.0

FmMRC

Frequency variable RC

oscillation source oscillation

2.2 to 5.5

16

MHz

Oscillation

frequency

range

(Note 2-3)

FsX’tal

XT1, XT2

32.768kHz crystal resonator

oscillation

See Fig. 2.

2.2 to 5.5

32.768

kHz

Note 2-1: VDD must be held greater than or equal to 3.0V in the flash ROM onboard programming mode.

Note 2-2: Oscillation frequency and Operation cycle time (tCYC) rerationship: 1/1divide-3/FmCF, 1/2divide-6/FmCF

Note 2-3: The parts value of oscillation circuit is shown in Table 1 and Table 2.