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GSOT05CL-V датащит (PDF) 2 Page - Vishay Siliconix

№ деталь GSOT05CL-V
подробность  Two-Line ESD-Protection in SOT-23
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производитель  VISHAY [Vishay Siliconix]
домашняя страница  http://www.vishay.com
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GSOT05CL-V Datasheet(HTML) 2 Page - Vishay Siliconix

   
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For technical questions, contact: ESDprotection@vishay.com
Document Number: 85182
2
Rev. 1.2, 01-Jul-10
GSOT05CL-V
Vishay Semiconductors Two-Line ESD-Protection in SOT-23
BiAs-MODE (2-line bidirectional asymmetrical protection mode)
With the GSOT05CL-V two signal- or data-lines (L1, L2) can be protected against voltage transients. With pin 3 connected to
ground and pin 1 and pin 2 connected to a signal- or data-line which has to be protected. As long as the voltage level on the
data- or signal-line is between 0 V (ground level) and the specified maximum reverse working voltage (VRWM) the protection
diode between pin 2 and pin 3 and between pin 1 and pin 3 offer a high isolation to the ground line. The protection device
behaves like an open switch.
As soon as any positive transient voltage signal exceeds the break through voltage level of the protection diode, the diode
becomes conductive and shorts the transient current to ground. Now the protection device behaves like a closed switch. The
clamping voltage (VC) is defined by the breakthrough voltage (VBR) level plus the voltage drop at the series impedance
(resistance and inductance) of the protection device.
Any negative transient signal will be clamped accordingly. The negative transient current is flowing in the forward direction of
the protection diode. The low forward voltage (VF) clamps the negative transient close to the ground level.
Due to the different clamping levels in forward and reverse direction the GSOT05CL-V clamping behaviour is bidirectional and
asymmetrical (BiAs).
If a higher surge current or peak pulse current (IPP) is needed, both protection diodes in the GSOTxxC can also be used in
parallel in order to “double” the performance.
This offers:
• double surge power = double peak pulse current (2 x IPPM)
• half of the line inductance = reduced clamping voltage
• half of the line resistance = reduced clamping voltage
• double line capacitance (2 x CD)
• double reverse leakage current (2 x IR)
Note
• BiAs mode (between pin 1 to pin 3 or pin 2 to 1)
L1
L2
20358
2
1
3
Ground
BiAs
L1
20359
2
1
3
Ground
ELECTRICAL CHARACTERISTICS GSOT05CLV
PARAMETER
TEST CONDITIONS/REMARKS
SYMBOL
MIN.
TYP.
MAX.
UNIT
Protection paths
Number of lines which can be protected
Nchannel
--
1
lines
Reverse working voltage
at IR = 1 μA
VRWM
5.5
6.1
7
V
Reverse current
at VR = 5.5 V
IR
--
1
μA
Reverse breakdown voltage
at IR = 1 mA
VBR
66.75
-
V
Reverse clamping voltage
at IPP = 1 A
VC
-6.9
9
V
at IPP = IPPM = 13 A
-
10
12
V
Forward clamping voltage
at IPP = 1 A
VF
-1
1.3
V
at IPP = IPPM = 30 A
-
2.6
3
V
Capacitance
at VR = 0 V; f = 1 MHz
CD
-
100
120
pF
at VR = 2.5V; f = 1 MHz
-
60
-
pF


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