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ES51967 датащи(PDF) 3 Page - Cyrustek corporation

номер детали ES51967
подробное описание детали  6,600 Counts Auto DMM
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производитель  CYRUSTEK [Cyrustek corporation]
домашняя страница  http://www.cyrustek.com.tw
Logo CYRUSTEK - Cyrustek corporation

ES51967 датащи(HTML) 3 Page - Cyrustek corporation

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V2.6
10/09/27
3
Pin Description
Pin No
Symbol
Type
Description
1
V+
O
Output of on-chip DC-DC converter.
2
CREF+
I/O Positive connection for reference capacitor.
3
CREF-
I/O Negative connection for reference capacitor.
4
CINT
O
Integrator output. Connect to integral capacitor
5
CAZ
I
Auto-zero capacitor connection.
6
BUFF
O
Buffer output pin. Connect to integral resistor
7
RAZ
O
Buffer output pin in high-speed mode. Connect to high-speed integral
resistor.
8
IVSH
I
High current measurement input.
9
IVSL
I
Low current measurement input
10
OVX
I
Input high voltage for resistance measurement
11
OHMC
O
Filter capacitor connection for resistance mode below 6.600MΩ range.
12
OVH
I
Output connection for resistance measurement
13
OVSG
I
Sense low voltage for resistance measurement
14
OR1
O
Reference resistor connection for 660.0Ω range
15
VR5
O
Voltage measurement ÷10000 attenuator(1000V)
16
VR4
O
Voltage measurement ÷1000 attenuator(660.0V)
17
VR3
O
Voltage measurement ÷100 attenuator(66.00V)
18
VR2
O
Voltage measurement ÷10 attenuator(6.600V)
19
TEST5
I/O Test pin
20
ACVL
O
DC signal low input in ACV/ACA mode. Connect to negative output of
external AC to DC converter.
21
ACVH
O
DC signal high input in ACV/ACA mode. Connect to positive output of
external AC to DC converter.
22
ADI
I
Negative input of internal AC to DC OP Amp.
23
ADO
O
Output of internal AC to DC OP Amp.
24
ADOHZ
I
Frequency input under voltage/current mode, offset to AGND.
25
VRH
O
Output of band-gap voltage reference. Typically –1.2V
26
VR
I
Reference input voltage connection. Typically –400mV
27
VA+
I
For ADP mode. De-integrating voltage positive input. The input should
be higher than VA-.
28
VA-
I
For ADP mode. De-integrating voltage negative input. The input should
be lower than VA+.
29
ADP
I
Measurement input in ADP mode.
30
SGND
G
Signal Ground.
31
OHMC1
O
Filter capacitor connection for resistance mode under 660.0KΩ range.
32
VR1
I
Measurement input.
33
VBAR
I
In capacitance mode, a compensation capacitor is connected.
In temperature mode, it is used to control decimal point.
In µA or mA modes, pull to V- to disable the ‘µ2’ or ‘m2’ sign on LCD.
34
R9K
O
Connect to a precise 9KΩ resister for capacitor measurement.
35
R1K
O
Connect to a precise 1KΩ resister for capacitor measurement.
36
CA-
I/O Negative auto-zero capacitor connection for capacitor measurement
37
CA+
I/O Positive auto-zero capacitor connection for capacitor measurement
38
CSH+
O
Filter capacitor connection for resistance mode under 66.00MΩ range.
39
CSH-
O
Filter capacitor connection for resistance mode under 66.00MΩ range.
40
OHMC2
O
Filter capacitor connection for 6.600MΩ range in resistance mode.
41
SLEEP
O
Sleep mode indicator, asserts low in SLEEP mode.
42
FREQ
I
Frequency counter input, offset V-/2 internally by the chip.
43
RS232
I
Assert low to enable serial data output.
44
DSHIFT
I
Pull to V- to have 0.01MΩ resolution in 66.00MΩ.
Pull to DGND or keep it float will change the resolution to 66.0MΩ.
45
BKLIT
I
Back light function. Pulse low to set BKOUT pin output.


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