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AD7992BRMZ-1REEL датащи(PDF) 6 Page - Analog Devices

номер детали AD7992BRMZ-1REEL
подробное описание детали  2-Channel, 12-Bit ADC with I2C-Compatible
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производитель  AD [Analog Devices]
домашняя страница  http://www.analog.com
Logo AD - Analog Devices

AD7992BRMZ-1REEL датащи(HTML) 6 Page - Analog Devices

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AD7992
Rev. 0 | Page 6 of 28
Limit at TMIN, TMAX
Parameter
Conditions
Min
Max
Unit
Description
t10
Standard mode
300
ns
tFDA, fall time of SDA signal
Fast mode
20 + 0.1 CB
300
ns
High speed mode
CB = 100 pF max
10
80
ns
CB = 400 pF max
20
160
ns
t11
Standard mode
1000
ns
tRCL, rise time of SCL signal
Fast mode
20 + 0.1 CB
300
ns
High speed mode
CB = 100 pF max
10
40
ns
CB = 400 pF max
20
80
ns
t11A
Standard mode
1000
ns
tRCL1, rise time of SCL signal after a repeated START
condition and after an acknowledge bit
Fast mode
20 + 0.1 CB
300
ns
High speed mode
CB = 100 pF max
10
80
ns
CB = 400 pF max
20
160
ns
t12
Standard mode
300
ns
tFCL, fall time of SCL signal
Fast mode
20 + 0.1 CB
300
ns
High speed mode
CB = 100 pF max
10
40
ns
CB = 400 pF max
20
80
ns
tSP
Fast mode
0
50
ns
Pulse width of suppressed spike
High speed mode
0
10
ns
tPOWER-UP
1
µs typ
Power-up time
1 A device must provide a data hold time for SDA in order to bridge the undefined region of the SCL falling edge.
2 For 3 V supplies, the maximum hold time with
CB = 100 pF max is 100 ns max.
P
S
S
P
t6
t4
t1
t3
t5
t8
t2
t11
t12
t6
SCL
SDA
t7
t9
t10
S = START CONDITION
P = STOP CONDITION
Figure 2. Two-Wire Serial Interface Timing Diagram


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