SN74HC163Q1

4BIT SYNCHRONOUS BINARY COUNTER

SCLS584A − MAY 2004 − REVISED APRIL 2008

1

POST OFFICE BOX 655303

description/ordering information

This synchronous, presettable counter features an

internal

carry

look-ahead

for

application

in

high-speed counting designs. The SN74HC163 is a

4-bit binary counter. Synchronous operation is

provided

by

having

all

flip-flops

clocked

simultaneously so that the outputs change coincident with each other when instructed by the count-enable

(ENP, ENT) inputs and internal gating. This mode of operation eliminates the output counting spikes normally

associated with synchronous (ripple-clock) counters. A buffered clock (CLK) input triggers the four flip-flops on

the rising (positive-going) edge of the clock waveform.

This counter is fully programmable; that is, it can be preset to any number between 0 and 9 or 15. As presetting

is synchronous, setting up a low level at the load input disables the counter and causes the outputs to agree

with the setup data after the next clock pulse, regardless of the levels of the enable inputs.

The clear function for the SN74HC163 is synchronous. A low level at the clear (CLR) input sets all four of the

flip-flop outputs low after the next low-to-high transition of CLK, regardless of the levels of the enable inputs.

This synchronous clear allows the count length to be modified easily by decoding the Q outputs for the maximum

count desired. The active-low output of the gate used for decoding is connected to CLR to synchronously clear

the counter to 0000 (LLLL).

The carry look-ahead circuitry provides for cascading counters for n-bit synchronous applications without

additional gating. ENP, ENT, and a ripple-carry output (RCO) are instrumental in accomplishing this function.

Both ENP and ENT must be high to count, and ENT is fed forward to enable RCO. Enabling RCO produces a

can be used to enable successive cascaded stages. Transitions at ENP or ENT are allowed, regardless of the

level of CLK.

TA

PACKAGE‡

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

−40

°C to 85°C

TSSOP − PW

Tape and reel

SN74HC163IPWRQ1

HC163I

† For the most current package and ordering information, see the Package Option Addendum at the end of this

document, or see the TI web site at http://www.ti.com.

‡ Package drawings, thermal data, and symbolization are available at http://www.ti.com/packaging.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PW PACKAGE

(TOP VIEW)

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

CLR

CLK

A

B

C

D

ENP

GND

RCO

ENT

LOAD

Copyright

 2008 Texas Instruments Incorporated

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.