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L6392 датащи(PDF) 4 Page - STMicroelectronics |
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L6392 датащи(HTML) 4 Page - STMicroelectronics |
4 / 20 page Pin connection L6392 4/20 Doc ID 14494 Rev 5 2 Pin connection Figure 2. Pins connection (top view) Table 2. Pin description Pin N# Pin name Type Function 1LIN I Low side driver logic input (active low) 2SD (1) I Shut down logic input (active low) 3 HIN I High side driver logic input (active high) 4 VCC P Lower section supply voltage 5 DT I Dead time setting 6 OPOUT O Opamp output 7 GND P Ground 8 OP+ I Opamp non inverting input 9 OP- I Opamp inverting input 10 LVG (1) 1. The circuit provides less than 1 V on the LVG and HVG pins (@ Isink = 10 mA), with VCC > 3 V. This allows to omitting the “bleeder” resistor connected between the gate and the source of the external MOSFET normally used to hold the pin low; the gate driver assures low impedance also in SD condition. O Low side driver output 11 NC Not connected 12 OUT P High side (floating) common voltage 13 HVG (1) O High side driver output 14 BOOT P Bootstrapped supply voltage VCC HIN LIN SD 1 3 2 4 NC OUT HVG BOOT 14 13 GND DT OPOUT LVG OP- 12 11 10 9 5 7 6 8 OP+ |
Аналогичный номер детали - L6392_10 |
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Аналогичное описание - L6392_10 |
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