поискавой системы для электроныых деталей |
|
FAN48630UC50X датащи(PDF) 11 Page - Fairchild Semiconductor |
|
FAN48630UC50X датащи(HTML) 11 Page - Fairchild Semiconductor |
11 / 15 page © 2011 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN48630 • Rev. 1.0.1 11 Circuit Description FAN48630 is a synchronous boost regulator, typically operating at 2.5 MHz in Continuous Conduction Mode (CCM), which occurs at moderate to heavy load current and low VIN voltages. The regulator includes a Bypass Mode that activates when VIN is above the boost regulator’s setpoint. In anticipation of a heavy load transition, the setpoint can be adjusted upward by fixed amounts with the VSEL pin to reduce the required system headroom during lighter-load operation to save power. Table 2. Operating States Mode Description Invoked When LIN Linear Startup VIN > VOUT SS Boost Soft-Start VOUT < VOUT(MIN) BST Boost Operating Mode VOUT = VOUT(MIN) BPS True Bypass Mode VIN > VOUT(MIN) Boost Mode The FAN48630 uses a current-mode modulator to achieve excellent transient response and smooth transitions between CCM and Discontinuous Conduction Mode (DCM) operation. During CCM operation, the device maintains a switching frequency of about 2.5 Mhz. In light-load operation (DCM), frequency is reduced to maintain high efficiency. Table 3. Boost Startup Sequence Start State Entry Exit End State Timeout (µs) LIN1 VIN > UVLO, EN=1 VOUT > VIN- 300 mV SS LIN2 512 LIN2 LIN1 Exit VOUT > VIN- 300 mV SS TIMEOUT FAULT 1024 SS LIN1 or LIN2 Exit VOUT=VOUT(MIN) BST OVERLOAD TIMEOUT FAULT 64 Shutdown and Startup If EN is LOW, all bias circuits are off and the regulator is in Shutdown Mode. During shutdown, current flow is prevented from VIN to VOUT, as well as reverse flow from VOUT to VIN. During startup, it is recommended to keep DC current draw below 500 mA. LIN State When EN is HIGH and VIN > UVLO, the regulator attempts to bring VOUT within 300 mV of VIN using the internal fixed current source from VIN (Q3). The current is limited to LIN1 set point. If VOUT reaches VIN-300 mV during LIN1 Mode, the SS state is initiated. Otherwise, LIN1 times out after 512 s and LIN2 Mode is entered. In LIN2 Mode, the current source is incremented to 2A. If VOUT fails to reach VIN-300 mV after 1024 s, a fault condition is declared. SS State Upon the successful completion of the LIN state (VOUT>VIN- 300 mV), the regulator begins switching with boost pulses current limited to 50% of nominal level. During SS state, VOUT is ramped up by stepping the internal reference. If VOUT fails to reach regulation during the SS ramp sequence for more than 64 µs, a fault condition is declared. If large COUT is used, the reference is automatically stepped slower to avoid excessive input current draw. BST State This is a normal operating state of the regulator. BPS State If VIN is above VREG when the SS Mode successfully completes, the device transitions directly to BPS Mode. FAST and SLOW Soft-Start Options FAN48630UC315X, FAN48630UC33X, FAN48630UC35X, and FAN48630UC37AX feature fast startup with EN to regulation time of 500 µs. LIN1 and LIN2 phase currents are doubled compared to SLOW options, SS phase is also faster. FAN48630UC45X and FAN48630UC50XS feature low startup with EN to regulation time of 1300 s to reduce inrush current. FAULT State The regulator enters the FAULT state under any of the following conditions: VOUT fails to achieve the voltage required to advance from LIN state to SS state. VOUT fails to achieve the voltage required to advance from SS state to BST state. Boost current limit triggers for 2 ms during the BST state. VDS protection threshold is exceeded during BPS state. Once a fault is triggered, the regulator stops switching and presents a high-impedance path between VIN and VOUT. After waiting 20 ms, a restart is attempted. Power Good Power good is 0 FAULT, 1 POWER GOOD, open-drain input. The Power good pin is provided for signaling the system when the regulator has successfully completed soft-start and no faults have occurred. Power good also functions as an early warning flag for high die temperature and overload conditions. PG is released HIGH when the soft-start sequence is successfully completed. PG is pulled LOW when PMOS current limit has triggered for 64 µs OR the die the temperature exceeds 120°C. PG is re-asserted when the device cools below to 100°C. Any FAULT condition causes PG to be de-asserted. |
Аналогичный номер детали - FAN48630UC50X |
|
Аналогичное описание - FAN48630UC50X |
|
|
ссылки URL |
Конфиденциальность |
ALLDATASHEETRU.COM |
Вашему бизинису помогли Аллдатащит? [ DONATE ] |
Что такое Аллдатащит | реклама | контакт | Конфиденциальность | обмен ссыками | поиск по производителю All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |