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AD7010ARS датащи(PDF) 1 Page - Analog Devices

номер детали AD7010ARS
подробное описание детали  CMOS JDC p/4 DQPSK Baseband Transmit Port
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производитель  AD [Analog Devices]
домашняя страница  http://www.analog.com
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AD7010ARS датащи(HTML) 1 Page - Analog Devices

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CMOS
JDC /4 DQPSK Baseband Transmit Port
AD7010
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
GENERAL DESCRIPTION
The AD7010 is a complete low power, CMOS,
π/4 DQPSK
modulator with single +5 V power supply. The part is designed
to perform the baseband conversion of I and Q transmit
waveforms in accordance with the Japanese Digital Cellular
Telephone system.
The on-chip
π/4 Differential Quadrature Phase Shift Keying
(DQPSK) digital modulator, which includes the Root Raised
Cosine filters, generates I and Q data in response to the transmit
data stream. The AD7010 also contains ramp control envelope
logic to shape the I and Q output waveforms when ramping up
or down at the beginning or end of a transmit burst.
Besides providing all the necessary logic to perform
π/4 DQPSK
modulation, the part also provides reconstruction filters to
smooth the DAC outputs, providing continuous time analog
outputs. The AD7010 generates differential analog outputs for
both the I and Q signals.
As it is a necessity for all digital mobile systems to use the lowest
possible power, the device has power down options. The
AD7010 is housed in a space efficient 24-pin SSOP (Shrink
Small Outline Package).
FEATURES
Single +5 V Supply
On-Chip
/4 DQPSK Modulator
Root-Raised-Cosine Tx Filters,
= 0.5
Two 10-Bit D/A Converters
4th Order Reconstruction Filters
Differential Analog Outputs
On-Chip Ramp Up/Down Power Control
On-Chip Tx Offset Calibration
Very Low Power Dissipation, 30 mW typ
Power Down Mode < 5
A
On-Chip Voltage Reference
24-Pin SSOP
APPLICATIONS
Japanese Digital Cellular Telephony
FUNCTIONAL BLOCK DIAGRAM
Tx CLK
BOUT
QTx
V
AA
MODE1
AD7010
10-BIT
I-DAC
2.46V
REFERENCE
POWER
CALIBRATION CIRCUITRY
π/4 DQPSK
MODULATOR
10-BIT
Q-DAC
Tx DATA
DGND
V
DD
MODE2
AGND
BYPASS
BIN
MCLK
READY
RECONSTRUCTION
FILTERS
RECONSTRUCTION
FILTERS
ITx
ITx
QTx


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