REV. B

Information furnished by Analog Devices is believed to be accurate and

reliable. However, no responsibility is assumed by Analog Devices for its

use, nor for any infringements of patents or other rights of third parties

which may result from its use. No license is granted by implication or

otherwise under any patent or patent rights of Analog Devices.

a

+5 V Powered

RS-232/RS-422 Transceiver

AD7306

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 617/329-4700

Fax: 617/326-8703

FEATURES

RS-232 and RS-422 on One Chip

Single +5 V Supply

0.1

F Capacitors

Short Circuit Protection

Excellent Noise Immunity

Low Power BiCMOS Technology

High Speed, Low Skew RS-422 Operation

–40 C to +85 C Operations

APPLICATIONS

DTE-DCE Interface

Packet Switching

Local Area Networks

Data Concentration

Data Multiplexers

Integrated Services Digital Network (ISDN)

GENERAL DESCRIPTION

The AD7306 line driver/receiver is a 5 V monolithic product

which provides an interface between TTL signal levels and dual

standard EIA RS-232/RS-422 signal levels. The part contains

two RS-232 drivers, one RS-422 driver, one RS-232 receiver,

and one receiver path which can be configured either as RS-232

or as RS-422.

An internal charge pump voltage converter facilitates operation

from a single +5 V power supply. The internal charge pump

generates

±10 V levels allowing RS-232 output levels to be de-

veloped without the need for external bipolar power supplies.

A highly efficient charge pump design allows operation using

non polarized, miniature 0.1

µF capacitors. This gives a consid-

erable saving in printed circuit board space over conventional

products which can use up to 10

µF capacitors. The charge

pump output voltages may also be used to power external cir-

cuitry which requires dual supplies.

The RS-232 channels are suitable for communications rates up

to 100 kHz and the RS-422 channels are suitable for high speed

communications up to 5 MHz. The RS-422 transmitter comple-

mentary outputs are closely matched and feature low timing

skew between the complementary outputs. This is often an es-

sential requirement to meet tight system timing specifications.

All inputs feature ESD protection, all driver outputs feature

high source and sink current capability and are internally pro-

tected against short circuits on the outputs. An epitaxial layer is

used to guard against latch-up.

The part is available in a 24-lead SOIC and 24-pin plastic DIP

package.

FUNCTIONAL BLOCK DIAGRAM

V+

C1+

C1–

V–

C2–

C2+

GND

NC

NC

NC = NO CONNECT

1

2

3

4

5

6

7

8

9

10

11

12

24

23

22

21

16

15

14

13

20

19

18

17

AD7306

SOIC

TOP VIEW

(Not to Scale)

GND

R1

T2

OUT

T1

OUT

R2

IN

R1

T3

R2

OUT

T3

IN

232/422 SEL

V

CC

R1

OUT

T1

IN

T2

IN

T3