поискавой системы для электроныых деталей
  Russian  ▼
ALLDATASHEETRU.COM

X  

AD73322LYR датащи(PDF) 9 Page - Analog Devices

номер детали AD73322LYR
подробное описание детали  Low Cost, Low Power CMOS General-Purpose Dual Analog Front End
Download  40 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
производитель  AD [Analog Devices]
домашняя страница  http://www.analog.com
Logo AD - Analog Devices

AD73322LYR датащи(HTML) 9 Page - Analog Devices

Back Button AD73322LYR Datasheet HTML 5Page - Analog Devices AD73322LYR Datasheet HTML 6Page - Analog Devices AD73322LYR Datasheet HTML 7Page - Analog Devices AD73322LYR Datasheet HTML 8Page - Analog Devices AD73322LYR Datasheet HTML 9Page - Analog Devices AD73322LYR Datasheet HTML 10Page - Analog Devices AD73322LYR Datasheet HTML 11Page - Analog Devices AD73322LYR Datasheet HTML 12Page - Analog Devices AD73322LYR Datasheet HTML 13Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 9 / 40 page
background image
REV. 0
AD73322L
–9–
TERMINOLOGY
Absolute Gain
Absolute gain is a measure of converter gain for a known signal.
Absolute gain is measured (differentially) with a 1 kHz sine wave at
0 dBm0 for the DAC and with a 1 kHz sine wave at 0 dBm0 for
the ADC. The absolute gain specification is used for gain track-
ing error specification.
Crosstalk
Crosstalk is due to coupling of signals from a given channel to
an adjacent channel. It is defined as the ratio of the amplitude of
the coupled signal to the amplitude of the input signal. Crosstalk
is expressed in dB.
Gain Tracking Error
Gain tracking error measures changes in converter output for
different signal levels relative to an absolute signal level. The
absolute signal level is 0 dBm0 (equal to absolute gain) at 1 kHz
for the DAC and 0 dBm0 (equal to absolute gain) at 1 kHz for
the ADC. Gain tracking error at 0 dBm0 (ADC) and 0 dBm0
(DAC) is 0 dB by definition.
Group Delay
Group Delay is defined as the derivative of radian phase with
respect to radian frequency, dø(f)/df. Group delay is a measure
of average delay of a system as a function of frequency. A linear
system with a constant group delay has a linear phase response.
The deviation of group delay from a constant indicates the
degree of nonlinear phase response of the system.
Idle Channel Noise
Idle channel noise is defined as the total signal energy measured
at the output of the device when the input is grounded (mea-
sured in the frequency range 300 Hz–3400 Hz).
Intermodulation Distortion
With inputs consisting of sine waves at two frequencies, fa and
fb, any active device with nonlinearities will create distortion
products at sum and difference frequencies of mfa
± nfb where
m, n = 0, 1, 2, 3, etc. Intermodulation terms are those for which
neither m nor n is equal to zero. For final testing, the second
order terms include (fa + fb) and (fa – fb), while the third order
terms include (2fa + fb), (2fa – fb), (fa + 2fb) and (fa – 2fb).
Power Supply Rejection
Power supply rejection measures the susceptibility of a device to
noise on the power supply. Power supply rejection is measured
by modulating the power supply with a sine wave and measuring
the noise at the output (relative to 0 dB).
Sample Rate
The sample rate is the rate at which the ADC updates its output
register and the DAC updates its output from its input register.
The sample rate can be chosen from a list of four that are fixed
relative to the DMCLK. Sample rate is set by programming bits
DIR0-1 in Control Register B of each channel.
SNR+THD
Signal-to-noise ratio plus harmonic distortion is defined to be
the ratio of the rms value of the measured input signal to the
rms sum of all other spectral components in the frequency range
300 Hz–3400 Hz, including harmonics but excluding dc.
ABBREVIATIONS
ADC
Analog-to-Digital Converter.
AFE
Analog Front End.
AGT
Analog Gain Tap.
ALB
Analog Loop-Back.
BW
Bandwidth.
CRx
A Control Register where x is a placeholder for an
alphabetic character (A–E). There are five read/
write control registers on the AD73322L—desig-
nated CRA through CRE.
CRx:n
A bit position, where n is a placeholder for a nu-
meric character (0–7), within a control register,
where x is a placeholder for an alphabetic charac-
ter (A–E). Position 7 represents the MSB and
Position 0 represents the LSB.
DAC
Digital-to-Analog Converter.
DGT
Digital Gain Tap.
DLB
Digital Loop-Back.
DMCLK
Device (Internal) Master Clock. This is the inter-
nal master clock resulting from the external master
clock (MCLK) being divided by the on-chip mas-
ter clock divider.
FS
Full Scale.
FSLB
Frame Sync Loop-Back—where the SDOFS of
the final device in a cascade is connected to the
RFS and TFS of the DSP and the SDIFS of
first device in the cascade. Data input and out-
put occur simultaneously. In the case of NonFSLB,
SDOFS and SDO are connected to the Rx Port
of the DSP while SDIFS and SDI are connected
to the Tx Port.
PGA
Programmable Gain Amplifier.
SC
Switched Capacitor.
SLB
Sport Loop-Back.
SNR
Signal-to-Noise Ratio.
SPORT
Serial Port.
THD
Total Harmonic Distortion.
VBW
Voice Bandwidth.


Аналогичный номер детали - AD73322LYR

производительномер деталидатащиподробное описание детали
logo
Analog Devices
AD73322LYR AD-AD73322LYR Datasheet
767Kb / 49P
   Low Cost, Low Power CMOS General-Purpose Dual Analog Front
AD73322LYR-REEL AD-AD73322LYR-REEL Datasheet
767Kb / 49P
   Low Cost, Low Power CMOS General-Purpose Dual Analog Front
AD73322LYR-REEL7 AD-AD73322LYR-REEL7 Datasheet
767Kb / 49P
   Low Cost, Low Power CMOS General-Purpose Dual Analog Front
AD73322LYRU AD-AD73322LYRU Datasheet
767Kb / 49P
   Low Cost, Low Power CMOS General-Purpose Dual Analog Front
AD73322LYRU-REEL AD-AD73322LYRU-REEL Datasheet
767Kb / 49P
   Low Cost, Low Power CMOS General-Purpose Dual Analog Front
More results

Аналогичное описание - AD73322LYR

производительномер деталидатащиподробное описание детали
logo
Analog Devices
AD73322ARZ AD-AD73322ARZ Datasheet
389Kb / 43P
   Low Cost, Low Power CMOS General-Purpose Dual Analog Front End
REV. B
AD73322 AD-AD73322_15 Datasheet
389Kb / 43P
   Low Cost, Low Power CMOS General-Purpose Dual Analog Front End
REV. B
AD73322 AD-AD73322 Datasheet
386Kb / 43P
   Low Cost, Low Power CMOS General-Purpose Dual Analog Front End
REV. B
AD73322L AD-AD73322L_15 Datasheet
1Mb / 48P
   Low Cost, Low Power CMOS General-Purpose Dual Analog Front End
REV. A
AD73311LARUZ AD-AD73311LARUZ Datasheet
357Kb / 36P
   Low Cost, Low Power CMOS General Purpose Analog Front End
REV. A
AD73311 AD-AD73311_15 Datasheet
340Kb / 36P
   Low Cost, Low Power CMOS General Purpose Analog Front End
REV. B
AD73311L AD-AD73311L_15 Datasheet
381Kb / 36P
   Low Cost, Low Power CMOS General Purpose Analog Front End
REV. A
AD73311L AD-AD73311L Datasheet
382Kb / 36P
   Low Cost, Low Power CMOS General Purpose Analog Front End
REV. A
AD73311ARZ-REEL AD-AD73311ARZ-REEL Datasheet
340Kb / 36P
   Low Cost, Low Power CMOS General Purpose Analog Front End
REV. B
AD73311LARUZ-RL7 AD-AD73311LARUZ-RL7 Datasheet
340Kb / 36P
   Low Cost, Low Power CMOS General Purpose Analog Front End
REV. B
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40


датащи скачать

Go To PDF Page


ссылки URL




Конфиденциальность
ALLDATASHEETRU.COM
Вашему бизинису помогли Аллдатащит?  [ DONATE ] 

Что такое Аллдатащит   |   реклама   |   контакт   |   Конфиденциальность   |   обмен ссыками   |   поиск по производителю
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com