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AD7701ARS датащи(PDF) 4 Page - Analog Devices

номер детали AD7701ARS
подробное описание детали  LC2MOS 16-Bit A/D Converter
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производитель  AD [Analog Devices]
домашняя страница  http://www.analog.com
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AD7701ARS датащи(HTML) 4 Page - Analog Devices

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AD7701
REV. D
–4–
ORDERING GUIDE
Temperature
Linearity
Package
Model
Range
Error (% FSR) Options*
AD7701AN
–40
°C to +85°C
0.003
N-20
AD7701BN
–40
°C to +85°C
0.0015
N-20
AD7701AR
–40
°C to +85°C
0.003
R-20
AD7701BR
–40
°C to +85°C
0.0015
R-20
AD7701ARS
–40
°C to +85°C
0.003
RS-28
AD7701AQ
–40
°C to +85°C
0.003
Q-20
AD7701BQ
–40
°C to +85°C
0.0015
Q-20
AD7701SQ
–55
°C to +125°C 0.003
Q-20
AD7701TQ
–55
°C to +125°C 0.0015
Q-20
NOTES
*N = Plastic DIP; Q = Cerdip; R = SOIC; RS = SSOP.
PIN FUNCTION DESCRIPTION
Pin
Mnemonic
Description
1
MODE
Selects the Serial Interface Mode. If MODE is tied to –5 V, the AD7701 will operate in the asynchronous
communications (ac) mode. The SCLK pin is configured as an input, and data is transmitted in two bytes,
each with one start bit and two stop bits. If MODE is tied to DGND, the synchronous external clocking
(SEC) mode is selected. SCLK is configured as an input, and the output appears without formatting, the
MSB coming first. If MODE is tied to +5 V, the AD7701 operates in the synchronous self-clocking (SSC)
mode. SCLK is configured as an output, with a clock frequency of fCLKlN/4 and 25% duty-cycle.
2
CLKOUT
Clock Output to generate an Internal Master Clock by connecting a crystal between CLKOUT and CLKIN.
If an external clock is used, CLKOUT is not connected.
3
CLKIN
Clock Input for External Clock.
4, 17
SC1, SC2
System Calibration Pins. The state of these pins, when CAL is taken high, determines the type of calibration
performed.
5
DGND
Digital Ground. Ground reference for all digital signals.
6DVSS
Digital Negative Supply, –5 V nominal.
7AVSS
Analog Negative Supply, –5 V nominal.
8
AGND
Analog Ground. Ground reference for all analog signals.
9AIN
Analog Input.
10
VREF
Voltage Reference Input, +2.5 V nominal. This determines the value of positive full-scale in the unipolar
mode and of both positive and negative full-scale in the bipolar mode.
11
SLEEP
Sleep mode pin. When this pin is taken low, the AD7701 goes into a low-power mode with typically 10
µW
power consumption.
12
BP/UP
Bipolar/Unipolar Mode Pin. When this pin is low, the AD7701 is configured for a unipolar input range going
from AGND to VREF. When Pin 12 is high, the AD7701 is configured for a bipolar input range,
±V
REF.
13
CAL
Calibration Mode Pin. When CAL is taken high for more than 4 cycles, the AD7701 is reset and performs a
calibration cycle when CAL is brought low again. The CAL pin can also be used as a strobe to synchronize
the operation of several AD7701s.
14
AVDD
Analog Positive Supply, +5 V nominal.
15
DVDD
Digital Positive Supply, +5 V nominal.
16
CS
Chip Select Input. When CS is brought low, the AD7701 will begin to transmit serial data in a format deter-
mined by the state of the MODE pin.
18
DRDY
Data Ready output. DRDY is low when valid data is available in the output register. It goes high after transmission
of a word is completed. It also goes high for four clock cycles when a new data word is being loaded into the out-
put register, to indicate that valid data is not available, irrespective of whether data transmission is complete or not.
19
SCLK
Serial Clock Input/Output. The SCLK pin in configured as an input or output, dependent on the type of se-
rial data transmission that has been selected by the MODE pin. When configured as an output in the syn-
chronous self-clocking mode, it has a frequency of fCLKIN/4 and a duty cycle of 25%.
20
SDATA
Serial Data Output. The AD7701’s output data is available at this pin as a 16-bit serial word. The transmis-
sion format is determined by the state of the MODE pin.
DIP, Cerdip, SOIC
MODE
SC1
DGND
CLKOUT
CLKIN
AGND
DVSS
AVSS
AIN
VREF
SDATA
SCLK
SC2
CAL
AVDD
DVDD
DRDY
CS
BP/UP
SLEEP
TOP VIEW
(Not to Scale)
AD7701
1
2
3
4
5
6
7
8
9
10
14
13
12
11
20
19
18
17
16
15
SSOP
MODE
SC1
DGND
CLKOUT
CLKIN
AGND
DVSS
AVSS
AIN
VREF
SDATA
SCLK
SC2
CAL
AVDD
DVDD
DRDY
CS
BP/UP
SLEEP
TOP VIEW
(Not to Scale)
AD7701
1
2
3
4
5
6
7
8
9
10
14
13
12
11
20
19
18
17
16
15
21
22
23
24
25
26
27
28
NC
NC
NC
NC
NC
NC
NC
NC
NC = NO CONNECT
PIN CONFIGURATIONS


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