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AD8345ARE-REEL датащи(PDF) 9 Page - Analog Devices |
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AD8345ARE-REEL датащи(HTML) 9 Page - Analog Devices |
9 / 16 page REV. 0 AD8345 –9– 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 AD8345 QBBP QBBN COM3 COM3 VPS2 VOUT COM2 COM3 IBBP IBBN COM3 COM1 LOIN LOIP VPS1 ENBL IP 1 T1 ETC1-1-13 2 3 4 5 LO R1 50 C6 1000pF C7 1000pF IN C3 1000pF C4 0.01 F +VS QP QN C1 1000pF C2 0.01 F +VS VOUT C5 1000pF Figure 3. Basic Connections LO FREQUENCY – MHz 40 –60 60 80 100 120 140 160 180 200 220 240 260 280 300 –55 –50 –45 –40 –35 –30 –25 –20 –15 –10 –5 VS = 5V, DIFFERENTIAL INPUT = 1.2V Figure 4. Typical Lower Frequency Sideband Suppression Performance Baseband I and Q Channel Drive The I and Q channel baseband inputs should be driven differen- tially. This is convenient as most modern high-speed DACs have differential outputs. For optimal performance at VS = 5 V, the drive signal should be a 1.2 V p-p differential signal with a bias level of 0.7 V; that is, each input should swing from 0.4 V to 1 V. If the AD8345 is being run on a lower supply voltage, the peak-to-peak voltage on the I and Q channel inputs must be reduced to avoid input clipping. For example, at a supply volt- age of 2.7 V, a 200 mV p-p differential drive is recommended. This will result in a corresponding reduction in output power (see TPC 1). The I and Q inputs have a large input bandwidth of approximately 80 MHz. At lower baseband input levels, the input bandwidth increases (see TPC 2). If the baseband signal has a high peak-to-average ratio (e.g., CDMA or WCDMA), the rms signal strength will have to be backed off from this peak level in order to prevent clipping of the signal peaks. Clipping of signal peaks will tend to increase signal leakage into adjacent channels. Backing off the I and Q signal strength in the manner recommended will reduce the output power by a corresponding amount. This also applies to multicarrier applications where the per-carrier output power will be lower by 3 dB for each doubling of the number of output carriers. BASIC CONNECTIONS The basic connections for operating the AD8345 are shown in Figure 3. A single power supply of between 2.7 V and 5.5 V is applied to pins VPS1 and VPS2. A pair of ESD protection diodes are connected internally between VPS1 and VPS2 so these must be tied to the same potential. Both pins should be individually decoupled using 1000 pF and 0.01 µF capacitors, located as close as possible to the device. For normal operation, the enable pin, ENBL, must be pulled high. The turn-on threshold for ENBL is VS/2. Pins COM1 to COM3 should all be tied to the same low impedance ground plane. LO Drive In Figure 3, a 50 Ω resistor to ground combines with the device’s high input impedance to provide an overall input impedance of approximately 50 Ω (see TPC 17 for a plot of LO port input impedance). For maximum LO suppression at the output, a differential LO drive is recommended. In Figure 3, this is achieved using a balun (M/A-COM Part Number ETC1-1-13). The output of the balun is ac coupled to the LO inputs which have a bias level about 1.8 V dc. An LO drive level of –2 dBm is recommended for lowest output noise. Higher levels will degrade linearity while lower levels will tend to increase the noise floor slightly. For example, reducing the LO power from –2 dBm to –10 dBm will increase the noise floor by approximately 0.3 dB (see TPC 19). The LO terminal can be driven single-ended at the expense of slightly higher LO leakage. LOIN is ac coupled to ground using a capacitor and LOIP is driven through a coupling capacitor from a (single-ended) 50 Ω source (this scheme could also be reversed with the drive signal being applied to LOIN). LO Frequency Range The frequency range on the LO input is limited by the internal quadrature phase splitter. The phase splitter generates drive signals for the internal mixers which are 90 ° out of phase relative to one another. Outside of the specified LO frequency range of 250 MHz to 1 GHz, this quadrature accuracy degrades, result- ing in decreased sideband suppression. See TPC 9 for a plot of sideband suppression vs. LO frequency from 250 MHz to 1 GHz. Figure 4 shows the sideband suppression of a typical device from 50 MHz to 300 MHz. The level of sideband suppression degradation below 250 MHz will be subject to manufacturing process variations. |
Аналогичный номер детали - AD8345ARE-REEL |
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Аналогичное описание - AD8345ARE-REEL |
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