поискавой системы для электроныых деталей
  Russian  ▼
ALLDATASHEETRU.COM

X  

AD8803AN датащи(PDF) 5 Page - Analog Devices

номер детали AD8803AN
подробное описание детали  Octal 8-Bit TrimDAC with Power Shutdown
Download  16 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
производитель  AD [Analog Devices]
домашняя страница  http://www.analog.com
Logo AD - Analog Devices

AD8803AN датащи(HTML) 5 Page - Analog Devices

  AD8803AN Datasheet HTML 1Page - Analog Devices AD8803AN Datasheet HTML 2Page - Analog Devices AD8803AN Datasheet HTML 3Page - Analog Devices AD8803AN Datasheet HTML 4Page - Analog Devices AD8803AN Datasheet HTML 5Page - Analog Devices AD8803AN Datasheet HTML 6Page - Analog Devices AD8803AN Datasheet HTML 7Page - Analog Devices AD8803AN Datasheet HTML 8Page - Analog Devices AD8803AN Datasheet HTML 9Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 5 / 16 page
background image
AD8801/AD8803
REV. A
–5–
For example, when VREFH = +5 V and VREFL = 0 V the follow-
ing output voltages will be generated for the following codes:
DVOX
Output State
(VREFH = +5 V, VREFL = 0 V)
255
4.98 V
Full-Scale
128
2.50 V
Half-Scale (Midscale Reset Value)
1
0.02 V
1 LSB
0
0.00 V
Zero-Scale
REFERENCE INPUTS (VREFH, VREFL)
The reference input pins set the output voltage range of all eight
DACs. In the case of the AD8801 only the VREFH pin is avail-
able to establish a user designed full-scale output voltage. The
external reference voltage can be any value between 0 and VDD
but must not exceed the VDD supply voltage. In the case of the
AD8803, which has access to the VREFL which establishes the
zero-scale output voltage, any voltage can be applied between
0 V and VDD. VREFL can be smaller or larger in voltage than
VREFH since the DAC design uses fully bidirectional switches as
shown in Figure 3. The input resistance to the DAC has a code
dependent variation that has a nominal worst case measured at
55H, which is approximately 2 kΩ. When VREFH is greater than
VREFL, the REFL reference must be able to sink current out of
the DAC ladder, while the REFH reference is sourcing current
into the DAC ladder. The DAC design minimizes reference
glitch current maintaining minimum interference between DAC
channels during code changes.
DAC OUTPUTS (O1–O8)
The eight DAC outputs present a constant output resistance of
approximately 5 k
Ω independent of code setting. The distribu-
tion of ROUT from DAC to DAC typically matches within
±1%.
However, device to device matching is process lot dependent
having a
±20% variation. The change in R
OUT with temperature
has a 500 ppm/
°C temperature coefficient. During power shut-
down all eight outputs are open circuited.
DAC
REG
#1
EN
ADDR
DEC
DAC
DAC
REG
#8
D10
D9
D8
D7
SER
REG
D
D0
..
.
..
.
..
.
DAC
1
AD8801/AD8803
D7
D0
DAC
8
D7
D0
8
R
R
VDD
VREFH
O1
O2
O3
O4
O5
O6
O7
O8
CS
CLK
SDI
SHDN
GND
RS
VREFL
.
..
..
.
.
..
(AD8801 ONLY)
(AD8803 ONLY)
Figure 4. Block Diagram
DIGITAL INTERFACING
The AD8801/AD8803 contains a standard three-wire serial in-
put control interface. The three inputs are clock (CLK), CS and
serial data input (SDI). The positive-edge sensitive CLK input
requires clean transitions to avoid clocking incorrect data into
the serial input register. Standard logic families work well. If
mechanical switches are used for product evaluation, they
should be debounced by a flip-flop or other suitable means. Fig-
ure 4 block diagram shows more detail of the internal digital cir-
cuitry. When CS is taken active low, the clock can load data into
the serial register on each positive clock edge, see Table II.
Table II.
Input Logic Control Truth Table
CS
CLK
Register Activity
1
X
No effect.
0
P
Shifts Serial Register one bit loading the
next bit in from the SDI pin.
P
X
Data is transferred from the serial register
to the decoded DAC register. See Figure 5.
NOTE: P = positive edge, X = don’t care.
The data setup and data hold times in the specification table
determine the data valid time requirements. The last 11 bits of
the data word entered into the serial register are held when CS
returns high. At the same time CS goes high it gates the address
decoder which enables one of the eight positive edge triggered
DAC registers, see Figure 5 detail.
...
DAC 1
DAC 2
DAC 8
ADDR
DECODE
SERIAL
REGISTER
CS
CLK
SDI
Figure 5. Equivalent Control Logic
The target DAC register is loaded with the last eight bits of the se-
rial data word completing one DAC update. Eight separate 11-bit
data words must be clocked in to change all eight output settings.
All digital inputs are protected with a series input resistor and
parallel Zener ESD structure shown in Figure 6. This applies to
digital input pins CS, SDI, RS, SHDN, CLK.
LOGIC
100
Figure 6. Equivalent ESD Protection Circuit
Digital inputs can be driven by voltages exceeding the AD8801/
AD8803 VDD value. This allows 5 V logic to interface directly to
the part when it is operated at 3 V.


Аналогичный номер детали - AD8803AN

производительномер деталидатащиподробное описание детали
logo
Analog Devices
AD8803AN AD-AD8803AN Datasheet
216Kb / 16P
   Octal 8-Bit TrimDAC with Power Shutdown
REV. A
More results

Аналогичное описание - AD8803AN

производительномер деталидатащиподробное описание детали
logo
Analog Devices
AD8801ARZ AD-AD8801ARZ Datasheet
216Kb / 16P
   Octal 8-Bit TrimDAC with Power Shutdown
REV. A
AD8803ARZ AD-AD8803ARZ Datasheet
216Kb / 16P
   Octal 8-Bit TrimDAC with Power Shutdown
REV. A
AD8803 AD-AD8803_15 Datasheet
216Kb / 16P
   Octal 8-Bit TrimDAC with Power Shutdown
REV. A
AD8801 AD-AD8801_15 Datasheet
216Kb / 16P
   Octal 8-Bit TrimDAC
REV. A
DAC8840 AD-DAC8840 Datasheet
513Kb / 12P
   8-Bit Octal, 4-Quadrant Multiplying, CMOS TrimDAC
REV. A
AD8842 AD-AD8842 Datasheet
506Kb / 12P
   8-Bit Octal, 4-Quadrant Multiplying, CMOS TrimDAC
REV. 0
DAC-8841 AD-DAC-8841 Datasheet
584Kb / 12P
   8-Bit Octal, 2-Quadrant Multiplying, CMOS TrimDAC
REV. A
AD8842ARZ AD-AD8842ARZ Datasheet
1Mb / 13P
   8-Bit Octal, 4-Quadrant Multiplying, CMOS TrimDAC
REV. A
DAC8840FPZ AD-DAC8840FPZ Datasheet
515Kb / 12P
   8-Bit Octal 4-Quadrant Mulyplying CMOS TrimDAC
REV. A
DAC8841 AD-DAC8841_13 Datasheet
587Kb / 12P
   8-Bit Octal, 2-Quadrant Multiplying, CMOS TrimDAC
REV. A
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16


датащи скачать

Go To PDF Page


ссылки URL




Конфиденциальность
ALLDATASHEETRU.COM
Вашему бизинису помогли Аллдатащит?  [ DONATE ] 

Что такое Аллдатащит   |   реклама   |   контакт   |   Конфиденциальность   |   обмен ссыками   |   поиск по производителю
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com