поискавой системы для электроныых деталей |
|
ADV7121KN30 датащи(PDF) 9 Page - Analog Devices |
|
ADV7121KN30 датащи(HTML) 9 Page - Analog Devices |
9 / 12 page ADV7121/ADV7122 –9– REV. B Video Synchronization & Control The ADV7122 has a single composite sync (SYNC) input con- trol. Many graphics processors and CRT controllers have the ability of generating horizontal sync (HSYNC), vertical sync (VSYNC) and composite SYNC. In a graphics system which does not automatically generate a composite SYNC signal, the inclusion of some additional logic circuitry will enable the generation of a composite SYNC signal. The sync current is internally connected directly to the IOG output, thus encoding video synchronization information onto the green video channel. If it is not required to encode sync in- formation onto the ADV7122, the SYNC input should be tied to logic low. Reference Input An external 1.23 V voltage reference is required to drive the ADV7121/ADV7122. The AD589 from Analog Devices is an ideal choice of reference. It is a two-terminal, low cost, tempera- ture compensated bandgap voltage reference which provides a fixed 1.23 V output voltage for input currents between 50 µA and 5 mA. Figure 4 shows a typical reference circuit connection diagram. The voltage reference gets its current drive from the ADV7121/ADV7122’s VAA through an onboard 1 kΩ resistor to the VREF pin. A 0.1 µF ceramic capacitor is required between the COMP pin and VAA. This is necessary so as to provide com- pensation for the internal reference amplifier. A resistance RSET connected between FS ADJUST and GND determines the amplitude of the output video level according to Equations 1 and 2 for the ADV7122 and Equation 3 for the ADV7121: IOG* (mA) = 12,082 × V REF (V)/RSET (Ω) (1) IOR, IOB (mA) = 8,628 × V REF (V)/RSET (Ω) (2) IOR, IOG, IOB (mA) = 7,969 × V REF (V)/RSET (Ω) (3) *Only applies to the ADV7122 when SYNC is being used. If SYNC is not being encoded onto the green channel, then Equation 1 will be similar to Equation 2. TO DACs V AA V REF GND 1k Ω FS ADJUST R SET 560 Ω 500 Ω 100 Ω ANALOG POWER PLANE COMP 0.01 µF 5V + I REF ≈ 5mA AD589 (1.235V VOLTAGE REFERENCE) ADV7121/ADV7122* *ADDITIONAL CIRCUITRY, INCLUDING DECOUPLING COMPONENTS, EXCLUDED FOR CLARIITY Figure 4. Reference Circuit Using a variable value of RSET, as shown in Figure 4, allows for accurate adjustment of the analog output video levels. Use of a fixed 560 Ω R SET resistor yields the analog output levels as quoted in the specification page. These values typically correspond to the RS-343A video waveform values as shown in Figure 3. D/A Converters The ADV7121/ADV7122 contains three matched 10-bit D/A converters. The DACs are designed using an advanced, high speed, segmented architecture. The bit currents corresponding to each digital input are routed to either the analog output (bit = “1”) or GND (bit = “0”) by a sophisticated decoding scheme. As all this circuitry is on one monolithic device, matching be- tween the three DACs is optimized. As well as matching, the use of identical current sources in a monolithic design guaran- tees monotonicity and low glitch. The onboard operational am- plifier stabilizes the full-scale output current against temperature and power supply variations. Analog Outputs The ADV7121/ADV7122 has three analog outputs, correspond- ing to the red, green and blue video signals. The red, green and blue analog outputs of the ADV7121/ ADV7122 are high impedance current sources. Each one of these three RGB current outputs is capable of directly driving a 37.5 Ω load, such as a doubly terminated 75 Ω coaxial cable. Figure 5a shows the required configuration for each of the three RGB outputs connected into a doubly terminated 75 Ω load. This arrangement will develop RS-343A video output voltage levels across a 75 Ω monitor. A suggested method of driving RS-170 video levels into a 75 Ω monitor is shown in Figure 5b. The output current levels of the DACs remain unchanged, but the source termination resistance, ZS, on each of the three DACs is increased from 75 Ω to 150 Ω. DACs IOR, IOG, IOB Z O = 75Ω (CABLE) Z S = 75Ω (SOURCE TERMINATION) TERMINATION REPEATED THREE TIMES FOR RED, GREEN AND BLUE DACs Z L = 75Ω (MONITOR) Figure 5a. Analog Output Termination for RS-343A DACs IOR, IOG, IOB Z O = 75Ω (CABLE) Z S = 150Ω (SOURCE TERMINATION) TERMINATION REPEATED THREE TIMES FOR RED, GREEN AND BLUE DACs Z L = 75Ω (MONITOR) Figure 5b. Analog Output Termination for RS-170 |
Аналогичный номер детали - ADV7121KN30 |
|
Аналогичное описание - ADV7121KN30 |
|
|
ссылки URL |
Конфиденциальность |
ALLDATASHEETRU.COM |
Вашему бизинису помогли Аллдатащит? [ DONATE ] |
Что такое Аллдатащит | реклама | контакт | Конфиденциальность | обмен ссыками | поиск по производителю All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |