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FAN3240TMX датащи(PDF) 10 Page - Fairchild Semiconductor

номер детали FAN3240TMX
подробное описание детали  The FAN324x family includes dual high-current relay drivers designed to drive dual-coil polarized latching...
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производитель  FAIRCHILD [Fairchild Semiconductor]
домашняя страница  http://www.fairchildsemi.com
Logo FAIRCHILD - Fairchild Semiconductor

FAN3240TMX датащи(HTML) 10 Page - Fairchild Semiconductor

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© 2011 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FAN3240 • Rev. 0.1.5
10
Theory of Operation
Polarized, bi-stabile, latching relays are utilized in many
kinds of electronic equipment and diverse applications.
These relays usually employ two coils; one to move the
relay contact(s) from open to closed position and
another coil to move the contact(s) from closed to open
position. To facilitate the mechanical movement, the
relay coils need to be energized for a specific time
interval. Once the contact(s) have changed position, the
voltage should be removed from the winding of the
relay. A simplified, typical circuit diagram is shown in
Figure 17 with example waveforms.
Figure 17. Simplified Diagram of a Relay Drive
As Figure 17 shows, a dual-coil relay is connected to its
supply rail at the center point of the two relay windings.
Each winding can be energized by the switches
connected to the relay coils. The two switches must not
be on at the same time because that would cause
excessive currents drawn from the supply rail, VS.
Furthermore, to accommodate the relatively long time
required for the relay contact to travel between its
stationary positions (ON and OFF positions), the pulse
must be longer than the minimum duration specified in
the relay datasheet. It is also desirable to limit the
maximum length of the drive pulse to prevent potential
saturation of the relay winding and to avoid over heating
the coils and drive electronics. The relay specification
also defines the minimum and maximum operating
voltages for reliable operation of the contact(s).
The FAN324x family of relay drivers is designed to
minimize component count and board space, while
increasing the reliability of the system and the noise
immunity of the circuitry driving the coils of the relay.
The
integrated
solution
provides
input
signal
qualification for the control signals, protection against
simultaneous activation of the two relay coils, a
maximum drive pulse duration limit, and many basic
functions; such as monitoring the relay bias voltage (VS)
for sufficient voltage level, driver enable input, and
thermal protection for the IC.
Functional Description
1.
Powering the Device (VS Pin)
The FAN324x device is powered through its VS pin by a
single voltage source, which should be the same source
powering the relay. In general, the VS pin should be
connected to the highest potential in the system
because the voltage stresses on all other pins shall not
exceed the VS pin voltage by more than the forward-
voltage drop of a P-N junction, as indicated in the
Absolute Maximum Ratings table.
During power-up, the FAN324x receives its bias voltage
from the VS pin. As the voltage rises at the VS pin, the
5 V output internal bias regulator starts working. The
voltage of the 5VB pin starts rising simultaneously with
the bias voltage at the VS pin. Once the VS voltage is
sufficiently high (as described below), the on-board
linear regulator enters regulation and provides bias for
the FAN324x internal circuitry.
Due to the low power consumption of the internal control
circuits; the on-board, low drop-out linear regulator is
fully functional and in regulation from approximately
5.5 V on the VS pin. At this point, the FAN324x is still in
under-voltage lockout (UVLO); i.e. the relay drive
outputs are disabled and exhibit high impedance
regardless of the status of the input and enable pins.
The device becomes fully functional when the VS
voltage exceeds the UVLO turn-on threshold and stays
operational until the VS voltage falls below the UVLO
turn-off threshold. The nominal UVLO hysteresis is
about 1 V to prevent turning on and off the device due to
noise when the VS voltage is near the UVLO threshold.
The startup behavior is shown in Figure 18.
Figure 18. Startup Waveforms
As Figure 18 demonstrates, the startup behavior of the
FAN324x devices are well controlled, the bias generator
enters regulation smoothly without overshoot or
oscillation, and the outputs remain high impedance
during the entire startup interval.


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