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74ALVCH245WMX датащи(PDF) 1 Page - Fairchild Semiconductor

номер детали 74ALVCH245WMX
подробное описание детали  Low Voltage Bidirectional Transceiver with Bushold
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производитель  FAIRCHILD [Fairchild Semiconductor]
домашняя страница  http://www.fairchildsemi.com
Logo FAIRCHILD - Fairchild Semiconductor

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© 2002 Fairchild Semiconductor Corporation
DS500648
www.fairchildsemi.com
September 2001
Revised February 2002
74ALVCH245
Low Voltage Bidirectional Transceiver with Bushold
General Description
The ALVCH245 contains eight non-inverting bidirectional
buffers with 3-STATE outputs and is intended for bus ori-
ented applications. The T/R input determines the direction
of data flow. The OE input disables both the A and B Ports
by placing them in a high impedance state. The ALVCH245
data inputs include active bushold circuitry, eliminating the
need for external pull-up resistors to hold unused or float-
ing data inputs at a valid logic level.
The 74ALVCH245 is designed for low voltage (1.65V to
3.6V) VCC applications.
The 74ALVCH245 is fabricated with an advanced CMOS
technology to achieve high-speed operation while main-
taining low CMOS power dissipation.
Features
s 1.65V to 3.6V VCC supply operation
s Bushold on data inputs eliminates the need for external
pull-up/pull-down resistors
s tPD
3.6 ns max for 3.0V to 3.6V VCC
4.2 ns max for 2.3V to 2.7V VCC
6 ns max for 1.65V to 1.95V VCC
s Uses patented Quiet Series noise/EMI reduction
circuitry
s Latchup conforms to JEDEC JED78
s ESD performance:
Human body model
> 2000V
Machine model
> 200V
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Pin Descriptions
Quiet Series
 is a trademark of Fairchild Semiconductor Corporation.
Order Number
Package Number
Package Description
74ALVCH245WM
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
74ALVCH245MTC
MTC20
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Pin Names
Description
OE
Output Enable Input (Active LOW)
T/R
Transmit/Receive Input
A0–A7
Side A Bushold Inputs or 3-STATE Outputs
B0–B7
Side B Bushold Inputs or 3-STATE Outputs


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