June 1997

Revised April 1999

© 1999 Fairchild Semiconductor Corporation

DS500014.prf

www.fairchildsemi.com

74VHCT138A

3-to-8 Decoder/Demultiplexer

General Description

The VHCT138A is an advanced high speed CMOS 3-to-8

DECODER fabricated with silicon gate CMOS technology.

It achieves the high speed operation similar to equivalent

Bipolar Schottky TTL while maintaining the CMOS low

power dissipation.

is held HIGH, decoding function is inhibited and all outputs

cade connection and for use as an address decoder for

memory systems. Protection circuits ensure that 0V to 7V

can be applied to the input pins without regard to the sup-

cuits prevent device destruction due to mismatched supply

and input/output voltages. This device can be used to inter-

face 3V to 5V systems and two supply systems such as

battery backup.

Features

s Power down protection is provided on all inputs and

outputs

s Pin and function compatible with 74HCT138

Ordering Code:

Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Logic Symbols

IEEE/IEC

Connection Diagram

Pin Descriptions

Order Number

Package Number

Package Description

74VHCT138AM

M16A

16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow

74VHCT138ASJ

M16D

16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

74VHCT138AMTC

MTC16

16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

74VHCT138AN

N16E

16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

Pin Names

Description

Address Inputs

Enable Inputs

Enable Input

Outputs