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ADF4116 датащи(PDF) 1 Page - Analog Devices |
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ADF4116 датащи(HTML) 1 Page - Analog Devices |
1 / 28 page RF PLL Frequency Synthesizers ADF4116/ADF4117/ADF4118 Rev. D Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringements of patents or other rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2000–2007 Analog Devices, Inc. All rights reserved. FEATURES ADF4116: 550 MHz ADF4117: 1.2 GHz ADF4118: 3.0 GHz 2.7 V to 5.5 V power supply Separate VP allows extended tuning voltage in 3 V systems Y Grade: −40°C to +125°C Dual-modulus prescaler ADF4116: 8/9 ADF4117/ADF4118: 32/33 3-wire serial interface Digital lock detect Power-down mode Fastlock mode APPLICATIONS Base stations for wireless radio (GSM, PCS, DCS, CDMA, WCDMA) Wireless handsets (GSM, PCS, DCS, CDMA, WCDMA) Wireless LANs Communications test equipment CATV equipment GENERAL DESCRIPTION The ADF411x family of frequency synthesizers can be used to implement local oscillators (LO) in the upconversion and downconversion sections of wireless receivers and transmitters. They consist of a low noise digital phase frequency detector (PFD), a precision charge pump, a programmable reference divider, programmable A and B counters, and a dual-modulus prescaler (P/P + 1). The A (5-bit) and B (13-bit) counters, in conjunction with the dual-modulus prescaler (P/P + 1), implement an N divider (N = BP + A). In addition, the 14-bit reference counter (R counter) allows selectable REFIN frequencies at the PFD input. A complete phase-locked loop (PLL) can be implemented if the synthesizer is used with an external loop filter and voltage controlled oscillator (VCO). All of the on-chip registers are controlled via a simple 3-wire interface. The devices operate with a power supply ranging from 2.7 V to 5.5 V and can be powered down when not in use. FUNCTIONAL BLOCK DIAGRAM REFERENCE N = BP + A FUNCTION LATCH PRESCALER P/P + 1 14-BIT R COUNTER 13-BIT B COUNTER 5-BIT A COUNTER 21-BIT INPUT REGISTER R COUNTER LATCH A, B COUNTER LATCH PHASE FREQUENCY DETECTOR CHARGE PUMP M3 M2 M1 HIGH Z MUX MUXOUT CP FLO FLO SWITCH 18 13 14 19 SDOUT SDOUT FROM FUNCTION LATCH 5 DGND AGND CE RFINB RFINA LE DATA CLK REFIN CPGND VP DVDD AVDD AVDD LOCK DETECT ADF4116/ADF4117/ADF4118 LOAD LOAD Figure 1. |
Аналогичный номер детали - ADF4116_07 |
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Аналогичное описание - ADF4116_07 |
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