SIi5013-X-GM datasheet(8/26 Pages) SILABS

номер детали	SIi5013-X-GM

подробное описание детали	OC-12/3, STM-4/1 SONET/SDH CDR IC WITH LIMITING AMPLIFIER

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Si5013

8

Rev. 1.6

Table 3. AC Characteristics (Clock and Data)

(VDD =3.3 V ±5%, TA = –40 to 85 °C)

Parameter

Symbol

Test Condition

Min

Typ

Max

Unit

Output Clock Rate

fCLK

Rate Sel = 1

Rate Sel = 0

616

154

—

675

158

MHz

Output Rise Time—OC-12

tR

Figure 3

—

125

155

ps

Output Fall Time—OC-12

tF

Figure 3

—

125

155

ps

Output Clock Duty Cycle—

OC-12/3

47

50

53

% of

UI

Clock to Data Delay

OC-12

OC-3

tCr-D

Figure 2

800

4000

860

4100

940

4200

ps

Clock to Data Delay

OC-12

OC-3

tCf-D

Figure 2

0

800

35

850

70

1000

ps

Input Return Loss

100 kHz–622 MHz

–15

—

dB

Slicing Level Offset

(relative to the internally set

input common mode voltage)

VSLICE

SLICE_LVL = 750 mV to 2.25 V

See Figure 8 on page 14.

Loss-of-Signal Range*

(peak-to-peak differential)

VLOS

LOS_LVL = 1.50 to 2.50 V

0

—

40

mV

Loss-of-Signal Response Time

tLOS

Figure 5 on page 6

8

20

25

µs

*Note: Adjustment voltage is calculated as follows:

VLOS = (LOS_LVL – 1.50)/25.

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