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HCPL-7721-360E датащи(PDF) 10 Page - AVAGO TECHNOLOGIES LIMITED |
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HCPL-7721-360E датащи(HTML) 10 Page - AVAGO TECHNOLOGIES LIMITED |
10 / 18 page 10 Application Information Bypassing and PC Board Layout The HCPL-772X/072X optocouplers are extremely easy to use. No external interface circuitry is required because the HCPL-772X/072X use high-speed CMOS IC technology allowing CMOS logic to be connected directly to the inputs and outputs. As shown in Figure 10, the only external components required for proper operation are two bypass capacitors. Ca- pacitor values should be between 0.01 µF and 0.1 µF. For each capacitor, the total lead length between both ends of the capacitor and the power-supply pins should not exceed 20 mm. Figure 11 illustrates the recommended printed circuit board layout for the HPCL-772X/072X. Figure 10. Recommended printed circuit board layout. Figure 11. Recommended printed circuit board layout Propagation Delay, Pulse-Width Distortion and Propagation Delay Skew Propagation Delay is a figure of merit that describes how quickly a logic signal propagates through a system. The propagation delay from low to high (tPLH) is the amount of time required for an input signal to propagate to the output, causing the output to change from low to high. Similarly, the propagation delay from high to low (tPHL) is the amount of time required for the input signal to propagate to the output, causing the output to change from high to low. See Figure 12. Figure 12. INPUT tPLH tPHL OUTPUT VI VO 10% 90% 90% 10% VOH VOL 0 V 50% 5 V CMOS 2.5 V CMOS HCPL-0710 fig 13 VDD2 C1 C2 VO GND2 VDD1 VI GND1 C1, C2 = 0.01 µF TO 0.1 µF 7 5 6 8 2 3 4 1 GND2 C1 C2 NC VDD2 NC VO VDD1 VI C1, C2 = 0.01 µF TO 0.1 µF GND1 |
Аналогичный номер детали - HCPL-7721-360E |
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Аналогичное описание - HCPL-7721-360E |
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