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FGB30N6S2DT датащи(PDF) 10 Page - Fairchild Semiconductor |
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FGB30N6S2DT датащи(HTML) 10 Page - Fairchild Semiconductor |
10 / 12 page ©2001 Fairchild Semiconductor Corporation FGH30N6S2D / FGP30N6S2D / FGB30NS2D Rev. A TO-220AB 3 LEAD JEDEC TO-220AB PLASTIC PACKAGE E ØP Q D H1 E1 L L1 60o b1 b 12 3 e e1 A c J1 45o D1 A1 TERM. 4 SYMBOL INCHES MILLIMETERS NOTES MIN MAX MIN MAX A 0.170 0.180 4.32 4.57 - A1 0.048 0.052 1.22 1.32 - b 0.030 0.034 0.77 0.86 3, 4 b1 0.045 0.055 1.15 1.39 2, 3 c 0.014 0.019 0.36 0.48 2, 3, 4 D 0.590 0.610 14.99 15.49 - D1 -0.160 -4.06 - E 0.395 0.410 10.04 10.41 - E1 -0.030 -0.76 - e 0.100 TYP 2.54 TYP 5 e1 0.200 BSC 5.08 BSC 5 H1 0.235 0.255 5.97 6.47 - J1 0.100 0.110 2.54 2.79 6 L 0.530 0.550 13.47 13.97 - L1 0.130 0.150 3.31 3.81 2 ØP 0.149 0.153 3.79 3.88 - Q 0.102 0.112 2.60 2.84 - NOTES: 1. These dimensions are within allowable dimensions of Rev. J of JEDEC TO- 220AB outline dated 3-24-87. 2. Lead dimension and finish uncontrolled in L1. 3. Lead dimension (without solder). 4. Add typically 0.002 inches (0.05mm) for solder coating. 5. Position of lead to be measured 0.250 inches (6.35mm) from bottom of dimen- sion D. 6. Position of lead to be measured 0.100 inches (2.54mm) from bottom of dimen- sion D. 7. Controlling dimension: Inch. 8. Revision 2 dated 7-97. |
Аналогичный номер детали - FGB30N6S2DT |
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Аналогичное описание - FGB30N6S2DT |
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