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74LVC1G07-Q100 датащи(PDF) 3 Page - NXP Semiconductors |
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74LVC1G07-Q100 датащи(HTML) 3 Page - NXP Semiconductors |
3 / 13 page 74LVC1G07_Q100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved. Product data sheet Rev. 1 — 23 May 2013 3 of 13 NXP Semiconductors 74LVC1G07-Q100 Buffer with open-drain output 6.2 Pin description 7. Functional description [1] H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF-state. 8. Limiting values [1] The minimum input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] When VCC = 0 V (Power-down mode), the output voltage can be 5.5 V in normal operation. [3] For TSSOP5 and SC-74A packages: above 87.5 C the value of P tot derates linearly with 4.0 mW/K. Table 3. Pin description Symbol Pin Description n.c. 1 not connected A 2 data input GND 3 ground (0 V) Y 4 data output VCC 5 supply voltage Table 4. Function table[1] Input A Output Y LL HZ Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Max Unit VCC supply voltage 0.5 +6.5 V IIK input clamping current VI <0V 50 - mA VI input voltage [1] 0.5 +6.5 V IOK output clamping current VO <0 V 50 - mA VO output voltage Active mode [1] 0.5 +6.5 V Power-down mode [1][2] 0.5 +6.5 V IO output current VO =0 V to 6.5 V - 50 mA ICC supply current - 100 mA IGND ground current 100 - mA Tstg storage temperature 65 +150 C Ptot total power dissipation Tamb = 40 C to +125 C [3] - 250 mW |
Аналогичный номер детали - 74LVC1G07-Q100 |
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Аналогичное описание - 74LVC1G07-Q100 |
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