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LM20SITLX датащи(PDF) 10 Page - Texas Instruments |
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LM20SITLX датащи(HTML) 10 Page - Texas Instruments |
10 / 18 page LM20 SNIS106P – DECEMBER 1999 – REVISED FEBRUARY 2013 www.ti.com Figure 10. Suggested Connection to a Sampling Analog to Digital Converter Input Stage Most CMOS ADCs found in ASICs have a sampled data comparator input structure that is notorious for causing grief to analog output devices such as the LM20 and many op amps. The cause of this grief is the requirement of instantaneous charge of the input sampling capacitor in the ADC. This requirement is easily accommodated by the addition of a capacitor. Since not all ADCs have identical input stages, the charge requirements will vary necessitating a different value of compensating capacitor. This ADC is shown as an example only. If a digital output temperature is required please refer to devices such as the LM74. 10 Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM20 |
Аналогичный номер детали - LM20SITLX |
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Аналогичное описание - LM20SITLX |
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